[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
[bug #40942] Load directive breaks Makefiles
From: |
anonymous |
Subject: |
[bug #40942] Load directive breaks Makefiles |
Date: |
Tue, 17 Dec 2013 17:05:21 +0000 |
User-agent: |
Mozilla/5.0 (Macintosh; Intel Mac OS X 10.8; rv:25.0) Gecko/20100101 Firefox/25.0 |
URL:
<http://savannah.gnu.org/bugs/?40942>
Summary: Load directive breaks Makefiles
Project: make
Submitted by: None
Submitted on: Tue 17 Dec 2013 05:05:20 PM UTC
Severity: 3 - Normal
Item Group: Bug
Status: None
Privacy: Public
Assigned to: None
Open/Closed: Open
Discussion Lock: Any
Component Version: 4.0
Operating System: Any
Fixed Release: None
Triage Status: None
_______________________________________________________
Details:
The new load feature in Make 4.0 is great but I am finding that the use of
"load" as a keyword breaks a lot of Makefiles.
In embedded development where Make is used in cross-compiling for a target
processor, "load" is common as a dummy target to start up/down-load code or
run on a target. In this context using "load" as a keyword is almost as bad as
using "clean" would be.
This can be fixed either by changing the keyword (e.g. load_object) or by
making the parser smart enough to distinguish between a target and a
directive.
_______________________________________________________
Reply to this item at:
<http://savannah.gnu.org/bugs/?40942>
_______________________________________________
Message sent via/by Savannah
http://savannah.gnu.org/
[Prev in Thread] |
Current Thread |
[Next in Thread] |
- [bug #40942] Load directive breaks Makefiles,
anonymous <=