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Re: Dependencies commands running (THIS IS A BUG) - make 3.81
From: |
Paul Smith |
Subject: |
Re: Dependencies commands running (THIS IS A BUG) - make 3.81 |
Date: |
Tue, 14 Feb 2017 08:20:47 -0500 |
On Mon, 2017-02-13 at 22:22 -0800, ruchi wrote:
> Hi Paul
> Thanks for looking into it.
I'm not sure what aspect of your mail software is causing your messages
to be sent twice, about 8 minutes apart, but it would be helpful if you
could disable it.
> It would be difficult for me to share the exact Makefile as its quite
> complex having around 70-80 targets.
We have no interest in your exact makefile. What I suggested was that
you create a makefile that (a) works and (b) shows the problem you're
seeing. I'm talking about a SSCCE: http://sscce.org/
For GNU make problems you don't even need source code, you can replace
compilers with "touch" statements or sleep statements or echo or
whatever.
> The thing is each target is itself having various subdirectories and its
> calling recursive submakes on those as well via the
> script which we are passing in "$(NOERR)+cd $(DIR) && time ./<script>"
>
> We are calling make for 2 archs (x86 and arm) , so in all there should be 6
> invocations when make is executed for
> 3 targets ( a , b ,c) where one of those is a dependent target.
> But in our case only 4 invocations happens for a,b respectively and c is
> totally ignored with the reason
> "Dependencies commands running (THIS IS A BUG)"
Without an actual example I can't be sure how you have implemented this,
but one thing to note is that make will only ever run any given target
one time within a single invocation of make, no matter how many times it
appears as a prerequisite.
So for example if you have:
all: foo bar
foo: c
bar: c
then "c" will only be built one time per invocation of make, even though
it appears as a prerequisite to two different targets. Marking targets
PHONY has no impact on this: they're still only built once.
If that doesn't help explain the behavior you're seeing, you'll need to
provide a working example.