[bug #55560] .SECONDEXPANSION and eval in target-specific prerequisite lists

[anonymous]

URL:
  <https://savannah.gnu.org/bugs/?55560>

                 Summary: .SECONDEXPANSION and eval in target-specific
prerequisite lists
                 Project: make
            Submitted by: None
            Submitted on: Thu 24 Jan 2019 04:33:32 PM UTC
                Severity: 3 - Normal
              Item Group: None
                  Status: None
                 Privacy: Public
             Assigned to: None
             Open/Closed: Open
         Discussion Lock: Any
       Component Version: 4.2.1
        Operating System: POSIX-Based
           Fixed Release: None
           Triage Status: None

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Details:

== Host ==
GNU Make 4.1
x86_64-pc-linux-gnu
Package Version: 4.1-9.1ubuntu1

== Background ==
I am attempting to export a target-specific variable in the context of a
prerequisite list; I would like to use this variable to update the
prerequisite list of *another target* mentioned in the prerequisite list
(which _should_ satifsy the  requirements for target-specific variable
inheritance).
 
The techniques in the articles Deferred Simple Variable Expansion
<http://make.mad-scientist.net/deferred-simple-variable-expansion> and
Target-specific and Pattern-specific GNU Make macros
<https://www.cmcrossroads.com/article/target-specific-and-pattern-specific-gnu-make-macros>
got me thinking that this might be possible. I believe the code below is a
valid solution, but I'm seeing inconsistent behavior and I'd like to
understand why.

== Build Files ==

=== Makefile ===

TARGET := libfoo

all: SOURCES := foo.cc bar.cc bin.cc

include library.mk



=== library.mk ===

SOURCES :=
WORKDIR := $(CURDIR)/.work-lib
LIBRARY := $(WORKDIR)/$(TARGET).so
OBJECTS = $(patsubst %,$(WORKDIR)/%.o,$(basename $(SOURCES)))

.SECONDEXPANSION:
.PHONY: all
all: $$(eval LIBRARY_OBJECTS \:= $$(OBJECTS)) $$(LIBRARY)
        @echo Built $(LIBRARY) with target $@

$(LIBRARY): $$(LIBRARY_OBJECTS)
        $(LD) $(LIBRARY_OBJECTS) -o $@

$(WORKDIR)/%.o: %.cc
$(WORKDIR)/%.o: %.cc %.d | create_dirtree
        $(CC) $*.cc -o $@


== Behavior ==
I was actually pleasantly surprised; on the first library I ran this on
everything compiled and linked. Prerequisites were properly marked as
out-of-date when a source changed, etc. 

The second library I attempted this on didn't work. LIBRARY_OBJECTS was not
getting picked up in the $(LIBRARY) prerequisite list, but were available for
linking which I was promptly notified with a whole bunch of g++ _No such file
or directory_ errors. 

I understand this is a very specific case, and I'd like to get to the bottom
of this issue, is there any more information I can provide?

==== Followup Question ====
0 Why must the colon be escaped in the following snippet (multiple target
errors otherwise)?

.SECONDEXPANSION:
all: $$(eval LIBRARY_OBJECTS \:= $$(OBJECTS))






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