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Re: [PATCH] Add riscv-sim.exp
From: |
Kito Cheng |
Subject: |
Re: [PATCH] Add riscv-sim.exp |
Date: |
Wed, 22 Jul 2020 13:02:40 +0800 |
On Tue, Jul 21, 2020 at 7:43 PM Tom Tromey <tromey@adacore.com> wrote:
>
> >>>>> "Rob" == Rob Savoye <rob@welcomehome.org> writes:
>
> Rob> On 7/20/20 9:11 PM, Kito Cheng wrote:
> >>> Do I correctly infer that this patch works with the sim tool shipped with
> >>> GDB?
> >> Tested with GDB simulator and qemu, but we use a tricky way to test
> >> with qemu, add a wrapper to qemu to made the interface same as gdb
> >> simulator[1].
>
> Rob> QEMU supports the gdbserver remote debugging protocol (-g), so is
> Rob> different from the sim interface. Linaro also had a way of using QEMU.
> Rob> but I tried to make something more generic. I'd be interested in your
> Rob> wrapper, but I think using the gdbserver protocol works better.
>
> Me too. I would actually like to remove "target sim" from gdb and
> switch the in-tree sims to using the remote protocol, though it's
> unclear if I'll ever actually get around to this.
Remote protocols need a port which means it's harder to parallel
testing in a single machine,
but I guess it could add some mechanism to randomly pick a port to prevent that.
So currently I prefer using simple qemu wrapper or gdb sim to run gcc
testsuite :P
- [PATCH] Add riscv-sim.exp, Kito Cheng, 2020/07/14
- Re: [PATCH] Add riscv-sim.exp, Jacob Bachmeyer, 2020/07/20
- Re: [PATCH] Add riscv-sim.exp, Rob Savoye, 2020/07/20
- Re: [PATCH] Add riscv-sim.exp, Kito Cheng, 2020/07/20
- Re: [PATCH] Add riscv-sim.exp, Rob Savoye, 2020/07/20
- Re: [PATCH] Add riscv-sim.exp, Tom Tromey, 2020/07/21
- Re: [PATCH] Add riscv-sim.exp,
Kito Cheng <=
- Re: [PATCH] Add riscv-sim.exp, Rob Savoye, 2020/07/22
- Re: [PATCH] Add riscv-sim.exp, Joel Sherrill, 2020/07/22
- Re: [PATCH] Add riscv-sim.exp, Tom Tromey, 2020/07/22
- Re: [PATCH] Add riscv-sim.exp, Rob Savoye, 2020/07/23
- Re: [PATCH] Add riscv-sim.exp, Kito Cheng, 2020/07/20