[Qemu-commits] [qemu/qemu] 2dc755: tcg/mips: Fix type of tcg_target_reg_alloc_order[]

[GitHub]

  Branch: refs/heads/master
  Home:   https://github.com/qemu/qemu
  Commit: 2dc7553d0c0a3915c649e1a91b0f0be70b4674b3
      
https://github.com/qemu/qemu/commit/2dc7553d0c0a3915c649e1a91b0f0be70b4674b3
  Author: James Hogan <address@hidden>
  Date:   2016-04-05 (Tue, 05 Apr 2016)

  Changed paths:
    M tcg/mips/tcg-target.inc.c

  Log Message:
  -----------
  tcg/mips: Fix type of tcg_target_reg_alloc_order[]

The MIPS TCG backend is the only one to have
tcg_target_reg_alloc_order[] elements of type TCGReg rather than int.
This resulted in commit 91478cefaaf2 ("tcg: Allocate indirect_base
temporaries in a different order") breaking the build on MIPS since the
type differed from indirect_reg_alloc_order[]:

tcg/tcg.c:1725:44: error: pointer type mismatch in conditional expression 
[-Werror]
     order = rev ? indirect_reg_alloc_order : tcg_target_reg_alloc_order;
                                      ^

Make it an array of ints to fix the build and match other architectures.

Fixes: 91478cefaaf2 ("tcg: Allocate indirect_base temporaries in a different 
order")
Signed-off-by: James Hogan <address@hidden>
Acked-by: Aurelien Jarno <address@hidden>
Message-Id: <address@hidden>
Signed-off-by: Richard Henderson <address@hidden>


  Commit: 627b4e23ccd2f9a12ab782efc63613bd7d5531c6
      
https://github.com/qemu/qemu/commit/627b4e23ccd2f9a12ab782efc63613bd7d5531c6
  Author: Peter Maydell <address@hidden>
  Date:   2016-04-05 (Tue, 05 Apr 2016)

  Changed paths:
    M tcg/mips/tcg-target.inc.c

  Log Message:
  -----------
  Merge remote-tracking branch 'remotes/rth/tags/pull-tcg-20160405' into staging

tcg/mips compilation fix

# gpg: Signature made Tue 05 Apr 2016 20:48:38 BST using RSA key ID 4DD0279B
# gpg: Good signature from "Richard Henderson <address@hidden>"
# gpg:                 aka "Richard Henderson <address@hidden>"
# gpg:                 aka "Richard Henderson <address@hidden>"

* remotes/rth/tags/pull-tcg-20160405:
  tcg/mips: Fix type of tcg_target_reg_alloc_order[]

Signed-off-by: Peter Maydell <address@hidden>


  Commit: 7acbff99c6c285b3070bf0e768d56f511e2bf346
      
https://github.com/qemu/qemu/commit/7acbff99c6c285b3070bf0e768d56f511e2bf346
  Author: Peter Maydell <address@hidden>
  Date:   2016-04-05 (Tue, 05 Apr 2016)

  Changed paths:
    M VERSION

  Log Message:
  -----------
  Update version for v2.6.0-rc1 release

Signed-off-by: Peter Maydell <address@hidden>


Compare: https://github.com/qemu/qemu/compare/43b0ea1a41bd...7acbff99c6c2