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[PATCH 00/13] target: Add Renesas RX architecture
From: |
Philippe Mathieu-Daudé |
Subject: |
[PATCH 00/13] target: Add Renesas RX architecture |
Date: |
Sun, 15 Mar 2020 14:27:56 +0100 |
This is a merger of Yoshinori's v32 of the Renesas RX
architecture emulation.
Richard temporarily handed it over for the 5.0 release.
This part adds the architectural part. The hardware part
will follow.
Call this release, or merge, candidate 1.
repo: https://gitlab.com/philmd/qemu.git
branch: rx_target_merger
Richard Henderson (6):
target/rx: Disassemble rx_index_addr into a string
target/rx: Replace operand with prt_ldmi in disassembler
target/rx: Use prt_ldmi for XCHG_mr disassembly
target/rx: Emit all disassembly in one prt()
target/rx: Collect all bytes during disassembly
target/rx: Dump bytes for each insn during disassembly
Yoshinori Sato (7):
hw/registerfields.h: Add 8bit and 16bit register macros
MAINTAINERS: Cover Renesas RX architecture
target/rx: TCG translation
target/rx: TCG helpers
target/rx: CPU definitions
target/rx: RX disassembler
Add rx-softmmu
configure | 11 +-
default-configs/rx-softmmu.mak | 2 +
qapi/machine.json | 4 +-
include/disas/dis-asm.h | 5 +
include/exec/poison.h | 1 +
include/hw/registerfields.h | 32 +-
include/sysemu/arch_init.h | 1 +
target/rx/cpu-param.h | 31 +
target/rx/cpu-qom.h | 43 +
target/rx/cpu.h | 180 +++
target/rx/helper.h | 31 +
target/rx/insns.decode | 621 ++++++++
arch_init.c | 2 +
target/rx/cpu.c | 226 +++
target/rx/disas.c | 1446 ++++++++++++++++++
target/rx/gdbstub.c | 112 ++
target/rx/helper.c | 149 ++
target/rx/op_helper.c | 470 ++++++
target/rx/translate.c | 2439 +++++++++++++++++++++++++++++++
tests/qtest/machine-none-test.c | 1 +
MAINTAINERS | 5 +
gdb-xml/rx-core.xml | 70 +
target/rx/Makefile.objs | 11 +
23 files changed, 5890 insertions(+), 3 deletions(-)
create mode 100644 default-configs/rx-softmmu.mak
create mode 100644 target/rx/cpu-param.h
create mode 100644 target/rx/cpu-qom.h
create mode 100644 target/rx/cpu.h
create mode 100644 target/rx/helper.h
create mode 100644 target/rx/insns.decode
create mode 100644 target/rx/cpu.c
create mode 100644 target/rx/disas.c
create mode 100644 target/rx/gdbstub.c
create mode 100644 target/rx/helper.c
create mode 100644 target/rx/op_helper.c
create mode 100644 target/rx/translate.c
create mode 100644 gdb-xml/rx-core.xml
create mode 100644 target/rx/Makefile.objs
--
2.21.1
- [PATCH 00/13] target: Add Renesas RX architecture,
Philippe Mathieu-Daudé <=
- [PATCH 01/13] hw/registerfields.h: Add 8bit and 16bit register macros, Philippe Mathieu-Daudé, 2020/03/15
- [PATCH 02/13] MAINTAINERS: Cover Renesas RX architecture, Philippe Mathieu-Daudé, 2020/03/15
- [PATCH 04/13] target/rx: TCG helpers, Philippe Mathieu-Daudé, 2020/03/15
- [PATCH 08/13] target/rx: Replace operand with prt_ldmi in disassembler, Philippe Mathieu-Daudé, 2020/03/15
- [PATCH 05/13] target/rx: CPU definitions, Philippe Mathieu-Daudé, 2020/03/15
- [PATCH 07/13] target/rx: Disassemble rx_index_addr into a string, Philippe Mathieu-Daudé, 2020/03/15
- [PATCH 09/13] target/rx: Use prt_ldmi for XCHG_mr disassembly, Philippe Mathieu-Daudé, 2020/03/15