[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
[PULL for-5.0 08/10] target/mips: Fix loongson multimedia condition inst
From: |
Richard Henderson |
Subject: |
[PULL for-5.0 08/10] target/mips: Fix loongson multimedia condition instructions |
Date: |
Mon, 30 Mar 2020 20:54:54 -0700 |
From: Jiaxun Yang <address@hidden>
Loongson multimedia condition instructions were previously implemented as
write 0 to rd due to lack of documentation. So I just confirmed with Loongson
about their encoding and implemented them correctly.
Signed-off-by: Jiaxun Yang <address@hidden>
Acked-by: Huacai Chen <address@hidden>
Reviewed-by: Richard Henderson <address@hidden>
Reviewed-by: Aleksandar Markovic <address@hidden>
Message-Id: <address@hidden>
Signed-off-by: Richard Henderson <address@hidden>
---
target/mips/translate.c | 35 +++++++++++++++++++++++++++++++----
1 file changed, 31 insertions(+), 4 deletions(-)
diff --git a/target/mips/translate.c b/target/mips/translate.c
index d745bd2803..25b595a17d 100644
--- a/target/mips/translate.c
+++ b/target/mips/translate.c
@@ -5529,6 +5529,7 @@ static void gen_loongson_multimedia(DisasContext *ctx,
int rd, int rs, int rt)
{
uint32_t opc, shift_max;
TCGv_i64 t0, t1;
+ TCGCond cond;
opc = MASK_LMI(ctx->opcode);
switch (opc) {
@@ -5862,14 +5863,39 @@ static void gen_loongson_multimedia(DisasContext *ctx,
int rd, int rs, int rt)
case OPC_SEQU_CP2:
case OPC_SEQ_CP2:
+ cond = TCG_COND_EQ;
+ goto do_cc_cond;
+ break;
case OPC_SLTU_CP2:
+ cond = TCG_COND_LTU;
+ goto do_cc_cond;
+ break;
case OPC_SLT_CP2:
+ cond = TCG_COND_LT;
+ goto do_cc_cond;
+ break;
case OPC_SLEU_CP2:
+ cond = TCG_COND_LEU;
+ goto do_cc_cond;
+ break;
case OPC_SLE_CP2:
- /*
- * ??? Document is unclear: Set FCC[CC]. Does that mean the
- * FD field is the CC field?
- */
+ cond = TCG_COND_LE;
+ do_cc_cond:
+ {
+ int cc = (ctx->opcode >> 8) & 0x7;
+ TCGv_i64 t64 = tcg_temp_new_i64();
+ TCGv_i32 t32 = tcg_temp_new_i32();
+
+ tcg_gen_setcond_i64(cond, t64, t0, t1);
+ tcg_gen_extrl_i64_i32(t32, t64);
+ tcg_gen_deposit_i32(fpu_fcr31, fpu_fcr31, t32,
+ get_fp_bit(cc), 1);
+
+ tcg_temp_free_i32(t32);
+ tcg_temp_free_i64(t64);
+ }
+ goto no_rd;
+ break;
default:
MIPS_INVAL("loongson_cp2");
generate_exception_end(ctx, EXCP_RI);
@@ -5878,6 +5904,7 @@ static void gen_loongson_multimedia(DisasContext *ctx,
int rd, int rs, int rt)
gen_store_fpr64(ctx, t0, rd);
+no_rd:
tcg_temp_free_i64(t0);
tcg_temp_free_i64(t1);
}
--
2.20.1
- Re: [PATCH for-5.0] tcg/i386: Fix INDEX_op_dup2_vec, (continued)
- [PULL for-5.0 03/10] configure: Do not force pie=no for non-x86, Richard Henderson, 2020/03/30
- [PULL for-5.0 02/10] tcg: Remove softmmu code_gen_buffer fixed address, Richard Henderson, 2020/03/30
- [PULL for-5.0 04/10] configure: Always detect -no-pie toolchain support, Richard Henderson, 2020/03/30
- [PULL for-5.0 05/10] configure: Unnest detection of -z, relro and -z, now, Richard Henderson, 2020/03/30
- [PULL for-5.0 06/10] configure: Override the os default with --disable-pie, Richard Henderson, 2020/03/30
- [PULL for-5.0 07/10] configure: Support -static-pie if requested, Richard Henderson, 2020/03/30
- [PULL for-5.0 08/10] target/mips: Fix loongson multimedia condition instructions,
Richard Henderson <=
- [PULL for-5.0 09/10] tcg/i386: Fix INDEX_op_dup2_vec, Richard Henderson, 2020/03/30
- [PULL for-5.0 10/10] decodetree: Use Python3 floor division operator, Richard Henderson, 2020/03/30
- Re: [PULL for-5.0 00/10] tcg patch queue, Peter Maydell, 2020/03/31