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[PATCH v5 05/48] target/nios2: Split out helper for eret instruction
From: |
Richard Henderson |
Subject: |
[PATCH v5 05/48] target/nios2: Split out helper for eret instruction |
Date: |
Thu, 10 Mar 2022 03:26:42 -0800 |
From: Amir Gonnen <amir.gonnen@neuroblade.ai>
The implementation of eret will become much more complex
with the introduction of shadow registers.
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Amir Gonnen <amir.gonnen@neuroblade.ai>
Message-Id: <20220303153906.2024748-3-amir.gonnen@neuroblade.ai>
[rth: Split out of a larger patch for shadow register sets.
Directly exit to the cpu loop from the helper.]
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
target/nios2/helper.h | 1 +
target/nios2/op_helper.c | 9 +++++++++
target/nios2/translate.c | 10 ++++++----
3 files changed, 16 insertions(+), 4 deletions(-)
diff --git a/target/nios2/helper.h b/target/nios2/helper.h
index a44ecfdf7a..525b6b685b 100644
--- a/target/nios2/helper.h
+++ b/target/nios2/helper.h
@@ -21,6 +21,7 @@
DEF_HELPER_FLAGS_2(raise_exception, TCG_CALL_NO_WG, noreturn, env, i32)
#if !defined(CONFIG_USER_ONLY)
+DEF_HELPER_3(eret, noreturn, env, i32, i32)
DEF_HELPER_2(mmu_write_tlbacc, void, env, i32)
DEF_HELPER_2(mmu_write_tlbmisc, void, env, i32)
DEF_HELPER_2(mmu_write_pteaddr, void, env, i32)
diff --git a/target/nios2/op_helper.c b/target/nios2/op_helper.c
index caa885f7b4..ee5ad8b23f 100644
--- a/target/nios2/op_helper.c
+++ b/target/nios2/op_helper.c
@@ -30,3 +30,12 @@ void helper_raise_exception(CPUNios2State *env, uint32_t
index)
cs->exception_index = index;
cpu_loop_exit(cs);
}
+
+#ifndef CONFIG_USER_ONLY
+void helper_eret(CPUNios2State *env, uint32_t new_status, uint32_t new_pc)
+{
+ env->regs[CR_STATUS] = new_status;
+ env->pc = new_pc;
+ cpu_loop_exit(env_cpu(env));
+}
+#endif /* !CONFIG_USER_ONLY */
diff --git a/target/nios2/translate.c b/target/nios2/translate.c
index 154ffacbea..7c2c430e99 100644
--- a/target/nios2/translate.c
+++ b/target/nios2/translate.c
@@ -391,10 +391,12 @@ static void eret(DisasContext *dc, uint32_t code,
uint32_t flags)
return;
}
- tcg_gen_mov_tl(cpu_R[CR_STATUS], cpu_R[CR_ESTATUS]);
- tcg_gen_mov_tl(cpu_pc, cpu_R[R_EA]);
-
- dc->base.is_jmp = DISAS_JUMP;
+#ifdef CONFIG_USER_ONLY
+ g_assert_not_reached();
+#else
+ gen_helper_eret(cpu_env, cpu_R[CR_ESTATUS], cpu_R[R_EA]);
+ dc->base.is_jmp = DISAS_NORETURN;
+#endif
}
/* PC <- ra */
--
2.25.1
- [PATCH v5 00/48] target/nios2: Shadow register set, EIC and VIC, Richard Henderson, 2022/03/10
- [PATCH v5 02/48] target/nios2: Stop generating code if gen_check_supervisor fails, Richard Henderson, 2022/03/10
- [PATCH v5 01/48] target/nios2: Check supervisor on eret, Richard Henderson, 2022/03/10
- [PATCH v5 04/48] target/nios2: Split PC out of env->regs[], Richard Henderson, 2022/03/10
- [PATCH v5 03/48] target/nios2: Add NUM_GP_REGS and NUM_CP_REGS, Richard Henderson, 2022/03/10
- [PATCH v5 05/48] target/nios2: Split out helper for eret instruction,
Richard Henderson <=
- [PATCH v5 06/48] target/nios2: Fix BRET instruction, Richard Henderson, 2022/03/10
- [PATCH v5 07/48] target/nios2: Do not create TCGv for control registers, Richard Henderson, 2022/03/10
- [PATCH v5 08/48] linux-user/nios2: Only initialize SP and PC in target_cpu_copy_regs, Richard Henderson, 2022/03/10
- [PATCH v5 09/48] target/nios2: Remove cpu_interrupts_enabled, Richard Henderson, 2022/03/10
- [PATCH v5 13/48] target/nios2: Use hw/registerfields.h for CR_STATUS fields, Richard Henderson, 2022/03/10
- [PATCH v5 11/48] target/nios2: Do not zero the general registers on reset, Richard Henderson, 2022/03/10