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[PULL 20/65] crypto: Create sm4_subword
From: |
Alistair Francis |
Subject: |
[PULL 20/65] crypto: Create sm4_subword |
Date: |
Fri, 8 Sep 2023 16:03:46 +1000 |
From: Max Chou <max.chou@sifive.com>
Allows sharing of sm4_subword between different targets.
Signed-off-by: Max Chou <max.chou@sifive.com>
Reviewed-by: Frank Chang <frank.chang@sifive.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Max Chou <max.chou@sifive.com>
Message-ID: <20230711165917.2629866-14-max.chou@sifive.com>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
---
include/crypto/sm4.h | 8 ++++++++
target/arm/tcg/crypto_helper.c | 10 ++--------
2 files changed, 10 insertions(+), 8 deletions(-)
diff --git a/include/crypto/sm4.h b/include/crypto/sm4.h
index 9bd3ebc62e..de8245d8a7 100644
--- a/include/crypto/sm4.h
+++ b/include/crypto/sm4.h
@@ -3,4 +3,12 @@
extern const uint8_t sm4_sbox[256];
+static inline uint32_t sm4_subword(uint32_t word)
+{
+ return sm4_sbox[word & 0xff] |
+ sm4_sbox[(word >> 8) & 0xff] << 8 |
+ sm4_sbox[(word >> 16) & 0xff] << 16 |
+ sm4_sbox[(word >> 24) & 0xff] << 24;
+}
+
#endif
diff --git a/target/arm/tcg/crypto_helper.c b/target/arm/tcg/crypto_helper.c
index fdd70abbfd..7cadd61e12 100644
--- a/target/arm/tcg/crypto_helper.c
+++ b/target/arm/tcg/crypto_helper.c
@@ -614,10 +614,7 @@ static void do_crypto_sm4e(uint64_t *rd, uint64_t *rn,
uint64_t *rm)
CR_ST_WORD(d, (i + 3) % 4) ^
CR_ST_WORD(n, i);
- t = sm4_sbox[t & 0xff] |
- sm4_sbox[(t >> 8) & 0xff] << 8 |
- sm4_sbox[(t >> 16) & 0xff] << 16 |
- sm4_sbox[(t >> 24) & 0xff] << 24;
+ t = sm4_subword(t);
CR_ST_WORD(d, i) ^= t ^ rol32(t, 2) ^ rol32(t, 10) ^ rol32(t, 18) ^
rol32(t, 24);
@@ -651,10 +648,7 @@ static void do_crypto_sm4ekey(uint64_t *rd, uint64_t *rn,
uint64_t *rm)
CR_ST_WORD(d, (i + 3) % 4) ^
CR_ST_WORD(m, i);
- t = sm4_sbox[t & 0xff] |
- sm4_sbox[(t >> 8) & 0xff] << 8 |
- sm4_sbox[(t >> 16) & 0xff] << 16 |
- sm4_sbox[(t >> 24) & 0xff] << 24;
+ t = sm4_subword(t);
CR_ST_WORD(d, i) ^= t ^ rol32(t, 13) ^ rol32(t, 23);
}
--
2.41.0
- [PULL 11/65] target/riscv: Add Zvbc ISA extension support, (continued)
- [PULL 11/65] target/riscv: Add Zvbc ISA extension support, Alistair Francis, 2023/09/08
- [PULL 13/65] target/riscv: Refactor translation of vector-widening instruction, Alistair Francis, 2023/09/08
- [PULL 14/65] target/riscv: Refactor some of the generic vector functionality, Alistair Francis, 2023/09/08
- [PULL 15/65] target/riscv: Add Zvbb ISA extension support, Alistair Francis, 2023/09/08
- [PULL 16/65] target/riscv: Add Zvkned ISA extension support, Alistair Francis, 2023/09/08
- [PULL 19/65] target/riscv: Add Zvkg ISA extension support, Alistair Francis, 2023/09/08
- [PULL 22/65] target/riscv: Add Zvksed ISA extension support, Alistair Francis, 2023/09/08
- [PULL 21/65] crypto: Add SM4 constant parameter CK, Alistair Francis, 2023/09/08
- [PULL 17/65] target/riscv: Add Zvknh ISA extension support, Alistair Francis, 2023/09/08
- [PULL 18/65] target/riscv: Add Zvksh ISA extension support, Alistair Francis, 2023/09/08
- [PULL 20/65] crypto: Create sm4_subword,
Alistair Francis <=
- [PULL 24/65] target/riscv: Add Zihintntl extension ISA string to DTS, Alistair Francis, 2023/09/08
- [PULL 25/65] target/riscv: Fix zfa fleq.d and fltq.d, Alistair Francis, 2023/09/08
- [PULL 26/65] hw/intc: Fix upper/lower mtime write calculation, Alistair Francis, 2023/09/08
- [PULL 29/65] target/riscv: support the AIA device emulation with KVM enabled, Alistair Francis, 2023/09/08
- [PULL 28/65] linux-user/riscv: Use abi type for target_ucontext, Alistair Francis, 2023/09/08
- [PULL 23/65] target/riscv: Implement WARL behaviour for mcountinhibit/mcounteren, Alistair Francis, 2023/09/08
- [PULL 27/65] hw/intc: Make rtc variable names consistent, Alistair Francis, 2023/09/08
- [PULL 30/65] target/riscv: check the in-kernel irqchip support, Alistair Francis, 2023/09/08
- [PULL 31/65] target/riscv: Create an KVM AIA irqchip, Alistair Francis, 2023/09/08
- [PULL 32/65] target/riscv: update APLIC and IMSIC to support KVM AIA, Alistair Francis, 2023/09/08