Re: [PATCH 6/8] target/sparc: Fix VIS fpmerge input registers.

[Nick Bowler]

On 2023-09-28, Richard Henderson <richard.henderson@linaro.org> wrote:
> On 9/24/23 01:03, Nick Bowler wrote:
>>                   case 0x04b: /* VIS I fpmerge */
>>                       CHECK_FPU_FEATURE(dc, VIS1);
>> -                    gen_ne_fop_DDD(dc, rd, rs1, rs2,
>> gen_helper_fpmerge);
>> +                    cpu_src1_32 = gen_load_fpr_F(dc, rs1);
>> +                    cpu_src2_32 = gen_load_fpr_F(dc, rs2);
>> +                    cpu_dst_64 = gen_dest_fpr_D(dc, rd);
>> +                    gen_helper_fpmerge(cpu_dst_64, cpu_src1_32,
>> cpu_src2_32);
>> +                    gen_store_fpr_D(dc, rd, cpu_dst_64);
>>                       break;
>
> Use gen_ne_fop_DFF.

Good catch, I clearly missed that this can use the new helper, I will
respin this one.

Thanks,
  Nick