[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
[PATCH v2 2/3] target/hexagon: fix some occurrences of -Wshadow=local
From: |
Brian Cain |
Subject: |
[PATCH v2 2/3] target/hexagon: fix some occurrences of -Wshadow=local |
Date: |
Thu, 5 Oct 2023 15:22:05 -0700 |
Of the changes in this commit, the changes in `HELPER(commit_hvx_stores)()`
are less obvious. They are required because of some macro invocations like
SCATTER_OP_WRITE_TO_MEM().
e.g.:
In file included from ../target/hexagon/op_helper.c:31:
../target/hexagon/mmvec/macros.h:205:18: error: declaration of ‘i’ shadows
a previous local [-Werror=shadow=compatible-local]
205 | for (int i = 0; i < sizeof(MMVector); i += sizeof(TYPE)) { \
| ^
../target/hexagon/op_helper.c:157:17: note: in expansion of macro
‘SCATTER_OP_WRITE_TO_MEM’
157 | SCATTER_OP_WRITE_TO_MEM(uint16_t);
| ^~~~~~~~~~~~~~~~~~~~~~~
../target/hexagon/op_helper.c:135:9: note: shadowed declaration is here
135 | int i;
| ^
In file included from ../target/hexagon/op_helper.c:31:
../target/hexagon/mmvec/macros.h:204:19: error: declaration of ‘ra’ shadows
a previous local [-Werror=shadow=compatible-local]
204 | uintptr_t ra = GETPC(); \
| ^~
../target/hexagon/op_helper.c:160:17: note: in expansion of macro
‘SCATTER_OP_WRITE_TO_MEM’
160 | SCATTER_OP_WRITE_TO_MEM(uint32_t);
| ^~~~~~~~~~~~~~~~~~~~~~~
../target/hexagon/op_helper.c:134:15: note: shadowed declaration is here
134 | uintptr_t ra = GETPC();
| ^~
Reviewed-by: Matheus Tavares Bernardino <quic_mathbern@quicinc.com>
Signed-off-by: Brian Cain <bcain@quicinc.com>
---
target/hexagon/imported/alu.idef | 6 +++---
target/hexagon/mmvec/macros.h | 6 +++---
target/hexagon/op_helper.c | 9 +++------
target/hexagon/translate.c | 9 ++++-----
4 files changed, 13 insertions(+), 17 deletions(-)
diff --git a/target/hexagon/imported/alu.idef b/target/hexagon/imported/alu.idef
index 12d2aac5d4..b855676989 100644
--- a/target/hexagon/imported/alu.idef
+++ b/target/hexagon/imported/alu.idef
@@ -1142,9 +1142,9 @@
Q6INSN(A4_cround_rr,"Rd32=cround(Rs32,Rt32)",ATTRIBS(),"Convergent Round", {RdV
tmp128 = fSHIFTR128(tmp128, SHIFT);\
DST = fCAST16S_8S(tmp128);\
} else {\
- size16s_t rndbit_128 = fCAST8S_16S((1LL << (SHIFT - 1))); \
- size16s_t src_128 = fCAST8S_16S(SRC); \
- size16s_t tmp128 = fADD128(src_128, rndbit_128);\
+ rndbit_128 = fCAST8S_16S((1LL << (SHIFT - 1))); \
+ src_128 = fCAST8S_16S(SRC); \
+ tmp128 = fADD128(src_128, rndbit_128);\
tmp128 = fSHIFTR128(tmp128, SHIFT);\
DST = fCAST16S_8S(tmp128);\
}
diff --git a/target/hexagon/mmvec/macros.h b/target/hexagon/mmvec/macros.h
index a655634fd1..728a63d35f 100644
--- a/target/hexagon/mmvec/macros.h
+++ b/target/hexagon/mmvec/macros.h
@@ -201,14 +201,14 @@
} while (0)
#define SCATTER_OP_WRITE_TO_MEM(TYPE) \
do { \
- uintptr_t ra = GETPC(); \
+ uintptr_t ra_ = GETPC(); \
for (int i = 0; i < sizeof(MMVector); i += sizeof(TYPE)) { \
if (test_bit(i, env->vtcm_log.mask)) { \
TYPE dst = 0; \
TYPE inc = 0; \
for (int j = 0; j < sizeof(TYPE); j++) { \
uint8_t val; \
- val = cpu_ldub_data_ra(env, env->vtcm_log.va[i + j], ra); \
+ val = cpu_ldub_data_ra(env, env->vtcm_log.va[i + j], ra_);
\
dst |= val << (8 * j); \
inc |= env->vtcm_log.data.ub[j + i] << (8 * j); \
clear_bit(j + i, env->vtcm_log.mask); \
@@ -217,7 +217,7 @@
dst += inc; \
for (int j = 0; j < sizeof(TYPE); j++) { \
cpu_stb_data_ra(env, env->vtcm_log.va[i + j], \
- (dst >> (8 * j)) & 0xFF, ra); \
+ (dst >> (8 * j)) & 0xFF, ra_); \
} \
} \
} \
diff --git a/target/hexagon/op_helper.c b/target/hexagon/op_helper.c
index 8ca3976a65..da10ac5847 100644
--- a/target/hexagon/op_helper.c
+++ b/target/hexagon/op_helper.c
@@ -132,10 +132,9 @@ void HELPER(gather_store)(CPUHexagonState *env, uint32_t
addr, int slot)
void HELPER(commit_hvx_stores)(CPUHexagonState *env)
{
uintptr_t ra = GETPC();
- int i;
/* Normal (possibly masked) vector store */
- for (i = 0; i < VSTORES_MAX; i++) {
+ for (int i = 0; i < VSTORES_MAX; i++) {
if (env->vstore_pending[i]) {
env->vstore_pending[i] = 0;
target_ulong va = env->vstore[i].va;
@@ -162,7 +161,7 @@ void HELPER(commit_hvx_stores)(CPUHexagonState *env)
g_assert_not_reached();
}
} else {
- for (i = 0; i < sizeof(MMVector); i++) {
+ for (int i = 0; i < sizeof(MMVector); i++) {
if (test_bit(i, env->vtcm_log.mask)) {
cpu_stb_data_ra(env, env->vtcm_log.va[i],
env->vtcm_log.data.ub[i], ra);
@@ -505,10 +504,8 @@ void HELPER(probe_pkt_scalar_store_s0)(CPUHexagonState
*env, int args)
static void probe_hvx_stores(CPUHexagonState *env, int mmu_idx,
uintptr_t retaddr)
{
- int i;
-
/* Normal (possibly masked) vector store */
- for (i = 0; i < VSTORES_MAX; i++) {
+ for (int i = 0; i < VSTORES_MAX; i++) {
if (env->vstore_pending[i]) {
target_ulong va = env->vstore[i].va;
int size = env->vstore[i].size;
diff --git a/target/hexagon/translate.c b/target/hexagon/translate.c
index c00254e4d5..ab708bf823 100644
--- a/target/hexagon/translate.c
+++ b/target/hexagon/translate.c
@@ -484,7 +484,6 @@ static void gen_start_packet(DisasContext *ctx)
{
Packet *pkt = ctx->pkt;
target_ulong next_PC = ctx->base.pc_next + pkt->encod_pkt_size_in_bytes;
- int i;
/* Clear out the disassembly context */
ctx->next_PC = next_PC;
@@ -506,15 +505,15 @@ static void gen_start_packet(DisasContext *ctx)
bitmap_zero(ctx->vregs_read, NUM_VREGS);
bitmap_zero(ctx->qregs_read, NUM_QREGS);
ctx->qreg_log_idx = 0;
- for (i = 0; i < STORES_MAX; i++) {
+ for (int i = 0; i < STORES_MAX; i++) {
ctx->store_width[i] = 0;
}
ctx->s1_store_processed = false;
ctx->pre_commit = true;
- for (i = 0; i < TOTAL_PER_THREAD_REGS; i++) {
+ for (int i = 0; i < TOTAL_PER_THREAD_REGS; i++) {
ctx->new_value[i] = NULL;
}
- for (i = 0; i < NUM_PREGS; i++) {
+ for (int i = 0; i < NUM_PREGS; i++) {
ctx->new_pred_value[i] = NULL;
}
@@ -1228,7 +1227,7 @@ void hexagon_translate_init(void)
offsetof(CPUHexagonState, mem_log_stores[i].data64),
store_val64_names[i]);
}
- for (int i = 0; i < VSTORES_MAX; i++) {
+ for (i = 0; i < VSTORES_MAX; i++) {
snprintf(vstore_addr_names[i], NAME_LEN, "vstore_addr_%d", i);
hex_vstore_addr[i] = tcg_global_mem_new(cpu_env,
offsetof(CPUHexagonState, vstore[i].va),
--
2.25.1
- RE: [PATCH v2 3/3] target/hexagon: avoid shadowing globals, (continued)
- Re: [PATCH v2 3/3] target/hexagon: avoid shadowing globals, Philippe Mathieu-Daudé, 2023/10/09
- Re: [PATCH v2 3/3] target/hexagon: avoid shadowing globals, Philippe Mathieu-Daudé, 2023/10/09
- RE: [PATCH v2 3/3] target/hexagon: avoid shadowing globals, Brian Cain, 2023/10/09
- Re: [PATCH v2 3/3] target/hexagon: avoid shadowing globals, Philippe Mathieu-Daudé, 2023/10/10
- Re: [PATCH v2 3/3] target/hexagon: avoid shadowing globals, Markus Armbruster, 2023/10/10
- Re: [PATCH v2 3/3] target/hexagon: avoid shadowing globals, Philippe Mathieu-Daudé, 2023/10/10
- Re: [PATCH v2 3/3] target/hexagon: avoid shadowing globals, Thomas Huth, 2023/10/10
- RE: [PATCH v2 3/3] target/hexagon: avoid shadowing globals, Brian Cain, 2023/10/17
- Re: [PATCH v2 3/3] target/hexagon: avoid shadowing globals, Markus Armbruster, 2023/10/10
[PATCH v2 2/3] target/hexagon: fix some occurrences of -Wshadow=local,
Brian Cain <=
[PATCH v2 1/3] target/hexagon: move GETPC() calls to top level helpers, Brian Cain, 2023/10/05
Re: [PATCH v2 0/3] hexagon: GETPC() and shadowing fixes, Markus Armbruster, 2023/10/06