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[PATCH v8 17/29] hw/isa/piix4: Rename reset control operations to match
From: |
Bernhard Beschow |
Subject: |
[PATCH v8 17/29] hw/isa/piix4: Rename reset control operations to match PIIX3 |
Date: |
Sat, 7 Oct 2023 14:38:25 +0200 |
Both implementations are the same and will be shared upon merging.
Signed-off-by: Bernhard Beschow <shentey@gmail.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
---
hw/isa/piix4.c | 14 +++++++-------
1 file changed, 7 insertions(+), 7 deletions(-)
diff --git a/hw/isa/piix4.c b/hw/isa/piix4.c
index 9c8b6c98ab..eb456622c5 100644
--- a/hw/isa/piix4.c
+++ b/hw/isa/piix4.c
@@ -148,8 +148,8 @@ static void piix4_request_i8259_irq(void *opaque, int irq,
int level)
qemu_set_irq(s->cpu_intr, level);
}
-static void piix4_rcr_write(void *opaque, hwaddr addr, uint64_t val,
- unsigned int len)
+static void rcr_write(void *opaque, hwaddr addr, uint64_t val,
+ unsigned int len)
{
PIIX4State *s = opaque;
@@ -161,16 +161,16 @@ static void piix4_rcr_write(void *opaque, hwaddr addr,
uint64_t val,
s->rcr = val & 2; /* keep System Reset type only */
}
-static uint64_t piix4_rcr_read(void *opaque, hwaddr addr, unsigned int len)
+static uint64_t rcr_read(void *opaque, hwaddr addr, unsigned int len)
{
PIIX4State *s = opaque;
return s->rcr;
}
-static const MemoryRegionOps piix4_rcr_ops = {
- .read = piix4_rcr_read,
- .write = piix4_rcr_write,
+static const MemoryRegionOps rcr_ops = {
+ .read = rcr_read,
+ .write = rcr_write,
.endianness = DEVICE_LITTLE_ENDIAN,
.impl = {
.min_access_size = 1,
@@ -194,7 +194,7 @@ static void piix4_realize(PCIDevice *dev, Error **errp)
qdev_init_gpio_out_named(DEVICE(dev), &s->cpu_intr,
"intr", 1);
- memory_region_init_io(&s->rcr_mem, OBJECT(dev), &piix4_rcr_ops, s,
+ memory_region_init_io(&s->rcr_mem, OBJECT(dev), &rcr_ops, s,
"reset-control", 1);
memory_region_add_subregion_overlap(pci_address_space_io(dev),
PIIX_RCR_IOPORT, &s->rcr_mem, 1);
--
2.42.0
- [PATCH v8 23/29] hw/isa/piix: Share PIIX3's base class with PIIX4, (continued)
- [PATCH v8 23/29] hw/isa/piix: Share PIIX3's base class with PIIX4, Bernhard Beschow, 2023/10/07
- [PATCH v8 24/29] hw/isa/piix: Reuse PIIX3 base class' realize method in PIIX4, Bernhard Beschow, 2023/10/07
- [PATCH v8 25/29] hw/isa/piix: Rename functions to be shared for PCI interrupt triggering, Bernhard Beschow, 2023/10/07
- [PATCH v8 12/29] hw/isa/piix3: Create USB controller in host device, Bernhard Beschow, 2023/10/07
- [PATCH v8 26/29] hw/isa/piix: Reuse PIIX3's PCI interrupt triggering in PIIX4, Bernhard Beschow, 2023/10/07
- [PATCH v8 22/29] hw/isa/piix: Harmonize names of reset control memory regions, Bernhard Beschow, 2023/10/07
- [PATCH v8 28/29] hw/isa/piix: Implement multi-process QEMU support also for PIIX4, Bernhard Beschow, 2023/10/07
- [PATCH v8 19/29] hw/isa/piix3: Merge hw/isa/piix4.c, Bernhard Beschow, 2023/10/07
- [PATCH v8 20/29] hw/isa/piix: Allow for optional PIC creation in PIIX3, Bernhard Beschow, 2023/10/07
- [PATCH v8 29/29] hw/i386/pc_piix: Make PIIX4 south bridge usable in PC machine, Bernhard Beschow, 2023/10/07
- [PATCH v8 17/29] hw/isa/piix4: Rename reset control operations to match PIIX3,
Bernhard Beschow <=
- [PATCH v8 15/29] hw/isa/piix4: Remove unused inbound ISA interrupt lines, Bernhard Beschow, 2023/10/07
- [PATCH v8 27/29] hw/isa/piix: Resolve duplicate code regarding PCI interrupt wiring, Bernhard Beschow, 2023/10/07
- Re: [PATCH v8 00/29] Consolidate PIIX south bridges, Chuck Zmudzinski, 2023/10/08