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[PATCH v2 24/90] target/sparc: Move RDTBR, FLUSHW to decodetree
From: |
Richard Henderson |
Subject: |
[PATCH v2 24/90] target/sparc: Move RDTBR, FLUSHW to decodetree |
Date: |
Mon, 16 Oct 2023 23:11:38 -0700 |
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
target/sparc/insns.decode | 5 +++++
target/sparc/translate.c | 23 +++++++++++------------
2 files changed, 16 insertions(+), 12 deletions(-)
diff --git a/target/sparc/insns.decode b/target/sparc/insns.decode
index bab80514ba..c2d8b0dbbe 100644
--- a/target/sparc/insns.decode
+++ b/target/sparc/insns.decode
@@ -77,3 +77,8 @@ RDPR_wstate 10 rd:5 101010 01110 0 0000000000000
RDPR_gl 10 rd:5 101010 10000 0 0000000000000
RDPR_strand_status 10 rd:5 101010 11010 0 0000000000000
RDPR_ver 10 rd:5 101010 11111 0 0000000000000
+
+{
+ FLUSHW 10 00000 101011 00000 0 0000000000000
+ RDTBR 10 rd:5 101011 00000 0 0000000000000
+}
diff --git a/target/sparc/translate.c b/target/sparc/translate.c
index 9d01c53791..c6f64e7fbb 100644
--- a/target/sparc/translate.c
+++ b/target/sparc/translate.c
@@ -3479,6 +3479,7 @@ static TCGv do_rdtba(DisasContext *dc, TCGv dst)
return cpu_tbr;
}
+TRANS(RDTBR, 32, do_rd_special, supervisor(dc), a->rd, do_rdtba)
TRANS(RDPR_tba, 64, do_rd_special, supervisor(dc), a->rd, do_rdtba)
static TCGv do_rdpstate(DisasContext *dc, TCGv dst)
@@ -3617,6 +3618,16 @@ static TCGv do_rdver(DisasContext *dc, TCGv dst)
TRANS(RDPR_ver, 64, do_rd_special, supervisor(dc), a->rd, do_rdver)
+static bool trans_FLUSHW(DisasContext *dc, arg_FLUSHW *a)
+{
+#ifdef TARGET_SPARC64
+ gen_helper_flushw(tcg_env);
+ return advance_pc(dc);
+#else
+ return false;
+#endif
+}
+
#define CHECK_IU_FEATURE(dc, FEATURE) \
if (!((dc)->def->features & CPU_FEATURE_ ## FEATURE)) \
goto illegal_insn;
@@ -3647,18 +3658,6 @@ static void disas_sparc_legacy(DisasContext *dc,
unsigned int insn)
TCGv cpu_dst __attribute__((unused)) = tcg_temp_new();
TCGv cpu_tmp0 __attribute__((unused));
-#if defined(TARGET_SPARC64) || !defined(CONFIG_USER_ONLY)
- if (xop == 0x2b) { /* rdtbr / V9 flushw */
-#ifdef TARGET_SPARC64
- gen_helper_flushw(tcg_env);
-#else
- if (!supervisor(dc))
- goto priv_insn;
- gen_store_gpr(dc, rd, cpu_tbr);
-#endif
- break;
- }
-#endif
if (xop == 0x34) { /* FPU Operations */
if (gen_trap_ifnofpu(dc)) {
goto jmp_insn;
--
2.34.1
- [PATCH v2 14/90] target/sparc: Move FBPfcc and FBfcc to decodetree, (continued)
- [PATCH v2 14/90] target/sparc: Move FBPfcc and FBfcc to decodetree, Richard Henderson, 2023/10/17
- [PATCH v2 16/90] target/sparc: Merge gen_fcond with only caller, Richard Henderson, 2023/10/17
- [PATCH v2 18/90] target/sparc: Pass DisasCompare to advance_jump_cond, Richard Henderson, 2023/10/17
- [PATCH v2 19/90] target/sparc: Move SETHI to decodetree, Richard Henderson, 2023/10/17
- [PATCH v2 20/90] target/sparc: Move Tcc to decodetree, Richard Henderson, 2023/10/17
- [PATCH v2 17/90] target/sparc: Merge gen_branch_[an] with only caller, Richard Henderson, 2023/10/17
- [PATCH v2 21/90] target/sparc: Move RDASR, STBAR, MEMBAR to decodetree, Richard Henderson, 2023/10/17
- [PATCH v2 22/90] target/sparc: Move RDPSR, RDHPR to decodetree, Richard Henderson, 2023/10/17
- [PATCH v2 08/90] target/sparc: Remove sparcv7 cpu features, Richard Henderson, 2023/10/17
- [PATCH v2 23/90] target/sparc: Move RDWIM, RDPR to decodetree, Richard Henderson, 2023/10/17
- [PATCH v2 24/90] target/sparc: Move RDTBR, FLUSHW to decodetree,
Richard Henderson <=
- [PATCH v2 26/90] target/sparc: Move WRPSR, SAVED, RESTORED to decodetree, Richard Henderson, 2023/10/17
- [PATCH v2 27/90] target/sparc: Move WRWIM, WRPR to decodetree, Richard Henderson, 2023/10/17
- [PATCH v2 25/90] target/sparc: Move WRASR to decodetree, Richard Henderson, 2023/10/17
- [PATCH v2 29/90] target/sparc: Move basic arithmetic to decodetree, Richard Henderson, 2023/10/17
- [PATCH v2 28/90] target/sparc: Move WRTBR, WRHPR to decodetree, Richard Henderson, 2023/10/17
- [PATCH v2 32/90] target/sparc: Move UMUL, SMUL to decodetree, Richard Henderson, 2023/10/17
- [PATCH v2 30/90] target/sparc: Move ADDC to decodetree, Richard Henderson, 2023/10/17
- [PATCH v2 31/90] target/sparc: Move MULX to decodetree, Richard Henderson, 2023/10/17
- [PATCH v2 34/90] target/sparc: Move UDIVX, SDIVX to decodetree, Richard Henderson, 2023/10/17
- [PATCH v2 35/90] target/sparc: Move UDIV, SDIV to decodetree, Richard Henderson, 2023/10/17