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[PULL 09/24] target/arm: Fix CNTPCT_EL0 trapping from EL0 when HCR_EL2.E
From: |
Peter Maydell |
Subject: |
[PULL 09/24] target/arm: Fix CNTPCT_EL0 trapping from EL0 when HCR_EL2.E2H is 0 |
Date: |
Thu, 19 Oct 2023 14:35:22 +0100 |
From: Michal Orzel <michal.orzel@amd.com>
On an attempt to access CNTPCT_EL0 from EL0 using a guest running on top
of Xen, a trap from EL2 was observed which is something not reproducible
on HW (also, Xen does not trap accesses to physical counter).
This is because gt_counter_access() checks for an incorrect bit (1
instead of 0) of CNTHCTL_EL2 if HCR_EL2.E2H is 0 and access is made to
physical counter. Refer ARM ARM DDI 0487J.a, D19.12.2:
When HCR_EL2.E2H is 0:
- EL1PCTEN, bit [0]: refers to physical counter
- EL1PCEN, bit [1]: refers to physical timer registers
Drop entire block "if (hcr & HCR_E2H) {...} else {...}" from EL0 case
and fall through to EL1 case, given that after fixing checking for the
correct bit, the handling is the same.
Fixes: 5bc8437136fb ("target/arm: Update timer access for VHE")
Signed-off-by: Michal Orzel <michal.orzel@amd.com>
Tested-by: Oleksandr Tyshchenko <oleksandr_tyshchenko@epam.com>
Message-id: 20230928094404.20802-1-michal.orzel@amd.com
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
target/arm/helper.c | 17 +----------------
1 file changed, 1 insertion(+), 16 deletions(-)
diff --git a/target/arm/helper.c b/target/arm/helper.c
index 74fbb6e1d78..01cd1474565 100644
--- a/target/arm/helper.c
+++ b/target/arm/helper.c
@@ -2475,22 +2475,7 @@ static CPAccessResult gt_counter_access(CPUARMState
*env, int timeridx,
if (!extract32(env->cp15.c14_cntkctl, timeridx, 1)) {
return CP_ACCESS_TRAP;
}
-
- /* If HCR_EL2.<E2H,TGE> == '10': check CNTHCTL_EL2.EL1PCTEN. */
- if (hcr & HCR_E2H) {
- if (timeridx == GTIMER_PHYS &&
- !extract32(env->cp15.cnthctl_el2, 10, 1)) {
- return CP_ACCESS_TRAP_EL2;
- }
- } else {
- /* If HCR_EL2.<E2H> == 0: check CNTHCTL_EL2.EL1PCEN. */
- if (has_el2 && timeridx == GTIMER_PHYS &&
- !extract32(env->cp15.cnthctl_el2, 1, 1)) {
- return CP_ACCESS_TRAP_EL2;
- }
- }
- break;
-
+ /* fall through */
case 1:
/* Check CNTHCTL_EL2.EL1PCTEN, which changes location based on E2H. */
if (has_el2 && timeridx == GTIMER_PHYS &&
--
2.34.1
- [PULL 00/24] target-arm queue, Peter Maydell, 2023/10/19
- [PULL 01/24] hw/arm: Move raspberrypi-fw-defs.h to the include/hw/arm/ folder, Peter Maydell, 2023/10/19
- [PULL 02/24] hw/arm/exynos4210: Get arm_boot_info declaration from 'hw/arm/boot.h', Peter Maydell, 2023/10/19
- [PULL 12/24] hw/arm/sbsa-ref: use bsa.h for PPI definitions, Peter Maydell, 2023/10/19
- [PULL 14/24] arm/kvm: convert to kvm_get_one_reg, Peter Maydell, 2023/10/19
- [PULL 11/24] include/hw/arm: move BSA definitions to bsa.h, Peter Maydell, 2023/10/19
- [PULL 07/24] elf2dmp: limit print length for sign_rsds, Peter Maydell, 2023/10/19
- [PULL 09/24] target/arm: Fix CNTPCT_EL0 trapping from EL0 when HCR_EL2.E2H is 0,
Peter Maydell <=
- [PULL 10/24] {include/}hw/arm: refactor virt PPI logic, Peter Maydell, 2023/10/19
- [PULL 13/24] arm/kvm: convert to kvm_set_one_reg, Peter Maydell, 2023/10/19
- [PULL 21/24] target/arm/common-semi-target.h: Remove unnecessary boot.h include, Peter Maydell, 2023/10/19
- [PULL 23/24] hw/timer/npcm7xx_timer: Prevent timer from counting down past zero, Peter Maydell, 2023/10/19
- [PULL 16/24] hw/arm/smmuv3: Update ID register bit field definitions, Peter Maydell, 2023/10/19
- [PULL 17/24] hw/arm/smmuv3: Sort ID register setting into field order, Peter Maydell, 2023/10/19
- [PULL 24/24] contrib/elf2dmp: Use g_malloc(), g_new() and g_free(), Peter Maydell, 2023/10/19
- [PULL 18/24] hw/arm/smmuv3: Advertise SMMUv3.1-XNX feature, Peter Maydell, 2023/10/19
- [PULL 19/24] target/arm: Implement FEAT_HPMN0, Peter Maydell, 2023/10/19
- [PULL 03/24] xlnx-bbram: hw/nvram: Remove deprecated device reset, Peter Maydell, 2023/10/19