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[PATCH v3 04/90] target/sparc: Set TCG_GUEST_DEFAULT_MO
From: |
Richard Henderson |
Subject: |
[PATCH v3 04/90] target/sparc: Set TCG_GUEST_DEFAULT_MO |
Date: |
Fri, 20 Oct 2023 22:30:32 -0700 |
Always use TSO, per the Oracle 2015 manual.
This is slightly less restrictive than the TCG_MO_ALL default,
and happens to match the i386 model, which will eliminate a few
extra barriers on that host.
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
target/sparc/cpu.h | 23 +++++++++++++++++++++++
1 file changed, 23 insertions(+)
diff --git a/target/sparc/cpu.h b/target/sparc/cpu.h
index b3a98f1d74..9fc5c401d2 100644
--- a/target/sparc/cpu.h
+++ b/target/sparc/cpu.h
@@ -6,6 +6,29 @@
#include "exec/cpu-defs.h"
#include "qemu/cpu-float.h"
+/*
+ * From Oracle SPARC Architecture 2015:
+ *
+ * Compatibility notes: The PSO memory model described in SPARC V8 and
+ * SPARC V9 compatibility architecture specifications was never implemented
+ * in a SPARC V9 implementation and is not included in the Oracle SPARC
+ * Architecture specification.
+ *
+ * The RMO memory model described in the SPARC V9 specification was
+ * implemented in some non-Sun SPARC V9 implementations, but is not
+ * directly supported in Oracle SPARC Architecture 2015 implementations.
+ *
+ * Therefore always use TSO in QEMU.
+ *
+ * D.5 Specification of Partial Store Order (PSO)
+ * ... [loads] are followed by an implied MEMBAR #LoadLoad | #LoadStore.
+ *
+ * D.6 Specification of Total Store Order (TSO)
+ * ... PSO with the additional requirement that all [stores] are followed
+ * by an implied MEMBAR #StoreStore.
+ */
+#define TCG_GUEST_DEFAULT_MO (TCG_MO_LD_LD | TCG_MO_LD_ST | TCG_MO_ST_ST)
+
#if !defined(TARGET_SPARC64)
#define TARGET_DPREGS 16
#else
--
2.34.1
- [PATCH v3 00/90] target/sparc: Convert to decodetree, Richard Henderson, 2023/10/21
- [PATCH v3 01/90] target/sparc: Clear may_lookup for npc == DYNAMIC_PC, Richard Henderson, 2023/10/21
- [PATCH v3 03/90] target/sparc: Avoid helper_raise_exception in helper_st_asi, Richard Henderson, 2023/10/21
- [PATCH v3 02/90] target/sparc: Implement check_align inline, Richard Henderson, 2023/10/21
- [PATCH v3 04/90] target/sparc: Set TCG_GUEST_DEFAULT_MO,
Richard Henderson <=
- [PATCH v3 05/90] configs: Enable MTTCG for sparc, sparc64, Richard Henderson, 2023/10/21
- [PATCH v3 06/90] target/sparc: Define features via cpu-feature.h.inc, Richard Henderson, 2023/10/21
- [PATCH v3 07/90] target/sparc: Use CPU_FEATURE_BIT_* for cpu properties, Richard Henderson, 2023/10/21
- [PATCH v3 09/90] target/sparc: Add decodetree infrastructure, Richard Henderson, 2023/10/21
- [PATCH v3 08/90] target/sparc: Remove sparcv7 cpu features, Richard Henderson, 2023/10/21
- [PATCH v3 10/90] target/sparc: Define AM_CHECK for sparc32, Richard Henderson, 2023/10/21
- [PATCH v3 11/90] target/sparc: Move CALL to decodetree, Richard Henderson, 2023/10/21
- [PATCH v3 14/90] target/sparc: Move FBPfcc and FBfcc to decodetree, Richard Henderson, 2023/10/21
- [PATCH v3 12/90] target/sparc: Move BPcc and Bicc to decodetree, Richard Henderson, 2023/10/21
- [PATCH v3 13/90] target/sparc: Move BPr to decodetree, Richard Henderson, 2023/10/21