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[PATCH v3 44/90] target/sparc: Split out resolve_asi
From: |
Richard Henderson |
Subject: |
[PATCH v3 44/90] target/sparc: Split out resolve_asi |
Date: |
Fri, 20 Oct 2023 22:31:12 -0700 |
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
target/sparc/translate.c | 25 +++++++++++++++++++++----
1 file changed, 21 insertions(+), 4 deletions(-)
diff --git a/target/sparc/translate.c b/target/sparc/translate.c
index 2e2df42c53..f71c70a897 100644
--- a/target/sparc/translate.c
+++ b/target/sparc/translate.c
@@ -1906,15 +1906,25 @@ typedef struct {
MemOp memop;
} DisasASI;
-static DisasASI get_asi(DisasContext *dc, int insn, MemOp memop)
+/*
+ * Build DisasASI.
+ * For asi == -1, treat as non-asi.
+ * For ask == -2, treat as immediate offset (v8 error, v9 %asi).
+ */
+static DisasASI resolve_asi(DisasContext *dc, int asi, MemOp memop)
{
- int asi = GET_FIELD(insn, 19, 26);
ASIType type = GET_ASI_HELPER;
int mem_idx = dc->mem_idx;
+ if (asi == -1) {
+ /* Artificial "non-asi" case. */
+ type = GET_ASI_DIRECT;
+ goto done;
+ }
+
#ifndef TARGET_SPARC64
/* Before v9, all asis are immediate and privileged. */
- if (IS_IMM) {
+ if (asi < 0) {
gen_exception(dc, TT_ILL_INSN);
type = GET_ASI_EXCP;
} else if (supervisor(dc)
@@ -1957,7 +1967,7 @@ static DisasASI get_asi(DisasContext *dc, int insn, MemOp
memop)
type = GET_ASI_EXCP;
}
#else
- if (IS_IMM) {
+ if (asi < 0) {
asi = dc->asi;
}
/* With v9, all asis below 0x80 are privileged. */
@@ -2116,9 +2126,16 @@ static DisasASI get_asi(DisasContext *dc, int insn,
MemOp memop)
}
#endif
+ done:
return (DisasASI){ type, asi, mem_idx, memop };
}
+static DisasASI get_asi(DisasContext *dc, int insn, MemOp memop)
+{
+ int asi = IS_IMM ? -2 : GET_FIELD(insn, 19, 26);
+ return resolve_asi(dc, asi, memop);
+}
+
static void gen_ld_asi(DisasContext *dc, TCGv dst, TCGv addr,
int insn, MemOp memop)
{
--
2.34.1
- [PATCH v3 42/90] target/sparc: Move FLUSH, SAVE, RESTORE to decodetree, (continued)
- [PATCH v3 42/90] target/sparc: Move FLUSH, SAVE, RESTORE to decodetree, Richard Henderson, 2023/10/21
- [PATCH v3 41/90] target/sparc: Move JMPL, RETT, RETURN to decodetree, Richard Henderson, 2023/10/21
- [PATCH v3 46/90] target/sparc: Split out ldst functions with asi pre-computed, Richard Henderson, 2023/10/21
- [PATCH v3 43/90] target/sparc: Move DONE, RETRY to decodetree, Richard Henderson, 2023/10/21
- [PATCH v3 48/90] target/sparc: Move simple integer load/store to decodetree, Richard Henderson, 2023/10/21
- [PATCH v3 59/90] target/sparc: Move EDGE* to decodetree, Richard Henderson, 2023/10/21
- [PATCH v3 60/90] target/sparc: Move ARRAY* to decodetree, Richard Henderson, 2023/10/21
- [PATCH v3 52/90] target/sparc: Move CASA, CASXA to decodetree, Richard Henderson, 2023/10/21
- [PATCH v3 56/90] target/sparc: Move asi fp load/store to decodetree, Richard Henderson, 2023/10/21
- [PATCH v3 64/90] target/sparc: Move FMOVD, FNEGD, FABSD, FSRC*D, FNOT*D to decodetree, Richard Henderson, 2023/10/21
- [PATCH v3 44/90] target/sparc: Split out resolve_asi,
Richard Henderson <=
- [PATCH v3 45/90] target/sparc: Drop ifdef around get_asi and friends, Richard Henderson, 2023/10/21
- [PATCH v3 47/90] target/sparc: Use tcg_gen_qemu_{ld, st}_i128 for GET_ASI_DTWINX, Richard Henderson, 2023/10/21
- [PATCH v3 49/90] target/sparc: Move asi integer load/store to decodetree, Richard Henderson, 2023/10/21
- [PATCH v3 50/90] target/sparc: Move LDSTUB, LDSTUBA to decodetree, Richard Henderson, 2023/10/21
- [PATCH v3 53/90] target/sparc: Move PREFETCH, PREFETCHA to decodetree, Richard Henderson, 2023/10/21
- [PATCH v3 55/90] target/sparc: Move simple fp load/store to decodetree, Richard Henderson, 2023/10/21
- [PATCH v3 57/90] target/sparc: Move LDFSR, STFSR to decodetree, Richard Henderson, 2023/10/21
- [PATCH v3 58/90] target/sparc: Merge LDFSR, LDXFSR implementations, Richard Henderson, 2023/10/21
- [PATCH v3 61/90] target/sparc: Move ADDRALIGN* to decodetree, Richard Henderson, 2023/10/21
- [PATCH v3 65/90] target/sparc: Use tcg_gen_vec_{add,sub}*, Richard Henderson, 2023/10/21