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[PULL v3 28/38] tcg: Add tcg_gen_{ld,st}_i128
From: |
Richard Henderson |
Subject: |
[PULL v3 28/38] tcg: Add tcg_gen_{ld,st}_i128 |
Date: |
Mon, 23 Oct 2023 11:13:19 -0700 |
Do not require the translators to jump through concat and
extract of i64 in order to move values to and from env.
Tested-by: Song Gao <gaosong@loongson.cn>
Reviewed-by: Song Gao <gaosong@loongson.cn>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
include/tcg/tcg-op-common.h | 3 +++
tcg/tcg-op.c | 22 ++++++++++++++++++++++
2 files changed, 25 insertions(+)
diff --git a/include/tcg/tcg-op-common.h b/include/tcg/tcg-op-common.h
index 2048f92b5e..56d4e9cb9f 100644
--- a/include/tcg/tcg-op-common.h
+++ b/include/tcg/tcg-op-common.h
@@ -747,6 +747,9 @@ void tcg_gen_mov_i128(TCGv_i128 dst, TCGv_i128 src);
void tcg_gen_extr_i128_i64(TCGv_i64 lo, TCGv_i64 hi, TCGv_i128 arg);
void tcg_gen_concat_i64_i128(TCGv_i128 ret, TCGv_i64 lo, TCGv_i64 hi);
+void tcg_gen_ld_i128(TCGv_i128 ret, TCGv_ptr base, tcg_target_long offset);
+void tcg_gen_st_i128(TCGv_i128 val, TCGv_ptr base, tcg_target_long offset);
+
static inline void tcg_gen_concat32_i64(TCGv_i64 ret, TCGv_i64 lo, TCGv_i64 hi)
{
tcg_gen_deposit_i64(ret, lo, hi, 32, 32);
diff --git a/tcg/tcg-op.c b/tcg/tcg-op.c
index c29355b67b..b4dbb2f2ba 100644
--- a/tcg/tcg-op.c
+++ b/tcg/tcg-op.c
@@ -2880,6 +2880,28 @@ void tcg_gen_mov_i128(TCGv_i128 dst, TCGv_i128 src)
}
}
+void tcg_gen_ld_i128(TCGv_i128 ret, TCGv_ptr base, tcg_target_long offset)
+{
+ if (HOST_BIG_ENDIAN) {
+ tcg_gen_ld_i64(TCGV128_HIGH(ret), base, offset);
+ tcg_gen_ld_i64(TCGV128_LOW(ret), base, offset + 8);
+ } else {
+ tcg_gen_ld_i64(TCGV128_LOW(ret), base, offset);
+ tcg_gen_ld_i64(TCGV128_HIGH(ret), base, offset + 8);
+ }
+}
+
+void tcg_gen_st_i128(TCGv_i128 val, TCGv_ptr base, tcg_target_long offset)
+{
+ if (HOST_BIG_ENDIAN) {
+ tcg_gen_st_i64(TCGV128_HIGH(val), base, offset);
+ tcg_gen_st_i64(TCGV128_LOW(val), base, offset + 8);
+ } else {
+ tcg_gen_st_i64(TCGV128_LOW(val), base, offset);
+ tcg_gen_st_i64(TCGV128_HIGH(val), base, offset + 8);
+ }
+}
+
/* QEMU specific operations. */
void tcg_gen_exit_tb(const TranslationBlock *tb, unsigned idx)
--
2.34.1
- [PULL v3 16/38] tcg/arm: Use tcg_use_softmmu, (continued)
- [PULL v3 16/38] tcg/arm: Use tcg_use_softmmu, Richard Henderson, 2023/10/23
- [PULL v3 13/38] tcg/ppc: Disable TCG_REG_TB for Power9/Power10, Richard Henderson, 2023/10/23
- [PULL v3 18/38] tcg/i386: Use tcg_use_softmmu, Richard Henderson, 2023/10/23
- [PULL v3 20/38] tcg/mips: Use tcg_use_softmmu, Richard Henderson, 2023/10/23
- [PULL v3 22/38] tcg/riscv: Do not reserve TCG_GUEST_BASE_REG for guest_base zero, Richard Henderson, 2023/10/23
- [PULL v3 21/38] tcg/ppc: Use tcg_use_softmmu, Richard Henderson, 2023/10/23
- [PULL v3 17/38] tcg/aarch64: Use tcg_use_softmmu, Richard Henderson, 2023/10/23
- [PULL v3 19/38] tcg/loongarch64: Use tcg_use_softmmu, Richard Henderson, 2023/10/23
- [PULL v3 15/38] tcg: Provide guest_base fallback for system mode, Richard Henderson, 2023/10/23
- [PULL v3 27/38] tcg: Optimize past conditional branches, Richard Henderson, 2023/10/23
- [PULL v3 28/38] tcg: Add tcg_gen_{ld,st}_i128,
Richard Henderson <=
- [PULL v3 29/38] target/i386: Use i128 for 128 and 256-bit loads and stores, Richard Henderson, 2023/10/23
- [PULL v3 23/38] tcg/riscv: Use tcg_use_softmmu, Richard Henderson, 2023/10/23
- [PULL v3 24/38] tcg/s390x: Use tcg_use_softmmu, Richard Henderson, 2023/10/23
- [PULL v3 31/38] tcg: Export tcg_gen_ext_{i32,i64,tl}, Richard Henderson, 2023/10/23
- [PULL v3 32/38] tcg: Define MO_TL, Richard Henderson, 2023/10/23
- [PULL v3 34/38] target/i386: Use tcg_gen_ext_tl, Richard Henderson, 2023/10/23
- [PULL v3 33/38] target/arm: Use tcg_gen_ext_i64, Richard Henderson, 2023/10/23
- [PULL v3 25/38] tcg: drop unused tcg_temp_free define, Richard Henderson, 2023/10/23
- [PULL v3 26/38] tcg: Use constant zero when expanding with divu2, Richard Henderson, 2023/10/23
- [PULL v3 30/38] tcg: add negsetcondi, Richard Henderson, 2023/10/23