Re: [PATCH 4/5] target/loongarch: Add estimated reciprocal instructions

[Richard Henderson]

On 10/23/23 08:29, Jiajie Chen wrote:
> Add the following new instructions in LoongArch v1.1:
>
> - frecipe.s
> - frecipe.d
> - frsqrte.s
> - frsqrte.d
> - vfrecipe.s
> - vfrecipe.d
> - vfrsqrte.s
> - vfrsqrte.d
> - xvfrecipe.s
> - xvfrecipe.d
> - xvfrsqrte.s
> - xvfrsqrte.d
>
> They are guarded by CPUCFG2.FRECIPE. Altought the instructions allow
> implementation to improve performance by reducing precision, we use the
> existing softfloat implementation.
>
> Signed-off-by: Jiajie Chen <c@jia.je>
> ---
>   target/loongarch/cpu.h                         |  1 +
>   target/loongarch/disas.c                       | 12 ++++++++++++
>   target/loongarch/insn_trans/trans_farith.c.inc |  4 ++++
>   target/loongarch/insn_trans/trans_vec.c.inc    |  8 ++++++++
>   target/loongarch/insns.decode                  | 12 ++++++++++++
>   target/loongarch/translate.h                   |  6 ++++++
>   6 files changed, 43 insertions(+)

Acked-by: Richard Henderson <richard.henderson@linaro.org>


r~