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[PULL 03/94] target/sparc: Avoid helper_raise_exception in helper_st_asi
From: |
Richard Henderson |
Subject: |
[PULL 03/94] target/sparc: Avoid helper_raise_exception in helper_st_asi |
Date: |
Wed, 25 Oct 2023 17:13:44 -0700 |
Always use cpu_raise_exception_ra with GETPC for unwind.
Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
target/sparc/ldst_helper.c | 10 ++++++----
1 file changed, 6 insertions(+), 4 deletions(-)
diff --git a/target/sparc/ldst_helper.c b/target/sparc/ldst_helper.c
index 246de86c98..09066d5487 100644
--- a/target/sparc/ldst_helper.c
+++ b/target/sparc/ldst_helper.c
@@ -1650,7 +1650,7 @@ void helper_st_asi(CPUSPARCState *env, target_ulong addr,
target_ulong val,
int idx = ((asi & 2) >> 1) | ((asi & 8) >> 2);
env->dmmu.sun4v_tsb_pointers[idx] = val;
} else {
- helper_raise_exception(env, TT_ILL_INSN);
+ goto illegal_insn;
}
break;
case 0x33:
@@ -1662,7 +1662,7 @@ void helper_st_asi(CPUSPARCState *env, target_ulong addr,
target_ulong val,
*/
env->dmmu.sun4v_ctx_config[(asi & 8) >> 3] = val;
} else {
- helper_raise_exception(env, TT_ILL_INSN);
+ goto illegal_insn;
}
break;
case 0x35:
@@ -1679,7 +1679,7 @@ void helper_st_asi(CPUSPARCState *env, target_ulong addr,
target_ulong val,
int idx = ((asi & 2) >> 1) | ((asi & 8) >> 2);
env->immu.sun4v_tsb_pointers[idx] = val;
} else {
- helper_raise_exception(env, TT_ILL_INSN);
+ goto illegal_insn;
}
break;
case 0x37:
@@ -1691,7 +1691,7 @@ void helper_st_asi(CPUSPARCState *env, target_ulong addr,
target_ulong val,
*/
env->immu.sun4v_ctx_config[(asi & 8) >> 3] = val;
} else {
- helper_raise_exception(env, TT_ILL_INSN);
+ goto illegal_insn;
}
break;
case ASI_UPA_CONFIG: /* UPA config */
@@ -1920,6 +1920,8 @@ void helper_st_asi(CPUSPARCState *env, target_ulong addr,
target_ulong val,
default:
sparc_raise_mmu_fault(cs, addr, true, false, 1, size, GETPC());
return;
+ illegal_insn:
+ cpu_raise_exception_ra(env, TT_ILL_INSN, GETPC());
}
}
#endif /* CONFIG_USER_ONLY */
--
2.34.1
- [PULL 02/94] target/sparc: Implement check_align inline, (continued)
- [PULL 02/94] target/sparc: Implement check_align inline, Richard Henderson, 2023/10/25
- [PATCH 04/29] tcg/optimize: Do swap_commutative2 in do_constant_folding_cond2, Richard Henderson, 2023/10/25
- [PATCH 02/29] tcg/optimize: Split out arg_is_const_val, Richard Henderson, 2023/10/25
- [PULL 04/94] target/sparc: Set TCG_GUEST_DEFAULT_MO, Richard Henderson, 2023/10/25
- [PATCH 05/29] tcg/optimize: Split out arg_new_constant, Richard Henderson, 2023/10/25
- [PATCH 11/29] tcg/i386: Move tcg_cond_to_jcc[] into tcg_out_cmp, Richard Henderson, 2023/10/25
- [PATCH 09/29] tcg/arm: Support TCG_COND_TST{EQ,NE}, Richard Henderson, 2023/10/25
- [PULL 09/94] target/sparc: Partition cpu features, Richard Henderson, 2023/10/25
- [PULL 10/94] target/sparc: Add decodetree infrastructure, Richard Henderson, 2023/10/25
- [PATCH 01/29] tcg: Introduce TCG_COND_TST{EQ,NE}, Richard Henderson, 2023/10/25
- [PULL 03/94] target/sparc: Avoid helper_raise_exception in helper_st_asi,
Richard Henderson <=
- [PULL 07/94] target/sparc: Use CPU_FEATURE_BIT_* for cpu properties, Richard Henderson, 2023/10/25
- [PATCH 03/29] tcg/optimize: Split out do_constant_folding_cond1, Richard Henderson, 2023/10/25
- [PATCH 07/29] tcg/aarch64: Support TCG_COND_TST{EQ,NE}, Richard Henderson, 2023/10/25
- [PATCH 08/29] tcg/aarch64: Generate TBZ, TBNZ, Richard Henderson, 2023/10/25
- [PULL 05/94] configs: Enable MTTCG for sparc, sparc64, Richard Henderson, 2023/10/25
- [PATCH 10/29] tcg/i386: Pass x86 condition codes to tcg_out_cmov, Richard Henderson, 2023/10/25
- [PATCH 12/29] tcg/i386: Add rexw argument to tcg_out_testi, Richard Henderson, 2023/10/25
- [PATCH 14/29] tcg/loongarch64: Support TCG_COND_TST{EQ,NE}, Richard Henderson, 2023/10/25
- [PULL 14/94] target/sparc: Move BPr to decodetree, Richard Henderson, 2023/10/25