Re: [PATCH v1 4/4] target/riscv: Add itrigger_enabled field to CPURISCVState

[Richard Henderson]

On 11/10/22 13:15, LIU Zhiwei wrote:
> > > +static int debug_post_load(void *opaque, int version_id)
> > > +{
> > > +    RISCVCPU *cpu = opaque;
> > > +    CPURISCVState *env = &cpu->env;
> > > +
> > > +    if (icount_enabled()) {
> > > +        env->itrigger_enabled = riscv_itrigger_enabled(env);
> > > +    }
> > > +
> > > +    return 0;
> > > +}
> > > +
> > >   static const VMStateDescription vmstate_debug = {
> > >       .name = "cpu/debug",
> > >       .version_id = 2,
> > >       .minimum_version_id = 2,
> > The versions here should be bumped
>
> Hi Alistair and Richard,
>
> I am not sure if we should bump versions when just add post_load callback without adding 
> new fields.  I once upstreamed a patch
> with a similar change but not bumping version.

Simply adding a post_load does not require a version bump.


r~