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[RFC PATCH 14/39] target/riscv: Add vaesdf.vv decoding, translation and
From: |
Lawrence Hunter |
Subject: |
[RFC PATCH 14/39] target/riscv: Add vaesdf.vv decoding, translation and execution support |
Date: |
Thu, 19 Jan 2023 14:35:03 +0000 |
Signed-off-by: Lawrence Hunter <lawrence.hunter@codethink.co.uk>
---
target/riscv/helper.h | 1 +
target/riscv/insn32.decode | 1 +
target/riscv/insn_trans/trans_rvzvkns.c.inc | 1 +
target/riscv/vcrypto_helper.c | 31 +++++++++++++++++++++
4 files changed, 34 insertions(+)
diff --git a/target/riscv/helper.h b/target/riscv/helper.h
index 42349837ef..b7696cb6c4 100644
--- a/target/riscv/helper.h
+++ b/target/riscv/helper.h
@@ -1183,3 +1183,4 @@ DEF_HELPER_6(vandn_vx_d, void, ptr, ptr, tl, ptr, env,
i32)
DEF_HELPER_4(vaesef_vv, void, ptr, ptr, env, i32)
DEF_HELPER_4(vaesef_vs, void, ptr, ptr, env, i32)
+DEF_HELPER_4(vaesdf_vv, void, ptr, ptr, env, i32)
diff --git a/target/riscv/insn32.decode b/target/riscv/insn32.decode
index 0d65c2ea27..ca907dac85 100644
--- a/target/riscv/insn32.decode
+++ b/target/riscv/insn32.decode
@@ -912,3 +912,4 @@ vandn_vx 000001 . ..... ..... 100 ..... 1010111 @r_vm
# *** RV64 Zvkns vector crypto extension ***
vaesef_vv 101000 1 ..... 00011 010 ..... 1110111 @r2_vm_1
vaesef_vs 101001 1 ..... 00011 010 ..... 1110111 @r2_vm_1
+vaesdf_vv 101000 1 ..... 00001 010 ..... 1110111 @r2_vm_1
diff --git a/target/riscv/insn_trans/trans_rvzvkns.c.inc
b/target/riscv/insn_trans/trans_rvzvkns.c.inc
index dc4310882d..bd1f380a65 100644
--- a/target/riscv/insn_trans/trans_rvzvkns.c.inc
+++ b/target/riscv/insn_trans/trans_rvzvkns.c.inc
@@ -58,3 +58,4 @@ static bool vaes_check_vs(DisasContext *s, arg_rmr *a)
GEN_V_UNMASKED_TRANS(vaesef_vv, vaes_check_vv)
GEN_V_UNMASKED_TRANS(vaesef_vs, vaes_check_vs)
+GEN_V_UNMASKED_TRANS(vaesdf_vv, vaes_check_vv)
diff --git a/target/riscv/vcrypto_helper.c b/target/riscv/vcrypto_helper.c
index f59e090c03..24b5336fa7 100644
--- a/target/riscv/vcrypto_helper.c
+++ b/target/riscv/vcrypto_helper.c
@@ -191,6 +191,34 @@ static inline void xor_round_key(uint8_t
round_state[4][4], uint8_t *round_key)
}
}
+static inline void aes_inv_sub_bytes(uint8_t round_state[4][4])
+{
+ for (int j = 0; j < 16; j++) {
+ round_state[j / 4][j % 4] = AES_isbox[round_state[j / 4][j % 4]];
+ }
+}
+
+static inline void aes_inv_shift_bytes(uint8_t round_state[4][4])
+{
+ uint8_t temp;
+ temp = round_state[3][1];
+ round_state[3][1] = round_state[2][1];
+ round_state[2][1] = round_state[1][1];
+ round_state[1][1] = round_state[0][1];
+ round_state[0][1] = temp;
+ temp = round_state[0][2];
+ round_state[0][2] = round_state[2][2];
+ round_state[2][2] = temp;
+ temp = round_state[1][2];
+ round_state[1][2] = round_state[3][2];
+ round_state[3][2] = temp;
+ temp = round_state[0][3];
+ round_state[0][3] = round_state[1][3];
+ round_state[1][3] = round_state[2][3];
+ round_state[2][3] = round_state[3][3];
+ round_state[3][3] = temp;
+}
+
#define GEN_ZVKNS_HELPER_VV(NAME, ...) \
void HELPER(NAME)(void *vd_vptr, void *vs2_vptr, CPURISCVState *env, \
uint32_t desc) \
@@ -267,3 +295,6 @@ GEN_ZVKNS_HELPER_VV(vaesef_vv, aes_sub_bytes(round_state);
GEN_ZVKNS_HELPER_VS(vaesef_vs, aes_sub_bytes(round_state);
aes_shift_bytes(round_state);
xor_round_key(round_state, (uint8_t *)round_key);)
+GEN_ZVKNS_HELPER_VV(vaesdf_vv, aes_inv_shift_bytes(round_state);
+ aes_inv_sub_bytes(round_state);
+ xor_round_key(round_state, (uint8_t *)round_key);)
--
2.39.1
- [RFC PATCH 00/39] Add RISC-V cryptography extensions standardisation, Lawrence Hunter, 2023/01/19
- [RFC PATCH 09/39] target/riscv: Add vandn.[vv, vx, vi] decoding, translation and execution support, Lawrence Hunter, 2023/01/19
- [RFC PATCH 01/39] target/riscv: add zvkb cpu property, Lawrence Hunter, 2023/01/19
- [RFC PATCH 04/39] target/riscv: Add vclmulh.vv decoding, translation and execution support, Lawrence Hunter, 2023/01/19
- [RFC PATCH 02/39] target/riscv: Add vclmul.vv decoding, translation and execution support, Lawrence Hunter, 2023/01/19
- [RFC PATCH 16/39] target/riscv: Add vaesdm.vv decoding, translation and execution support, Lawrence Hunter, 2023/01/19
- [RFC PATCH 07/39] target/riscv: Add vbrev8.v decoding, translation and execution support, Lawrence Hunter, 2023/01/19
- [RFC PATCH 15/39] target/riscv: Add vaesdf.vs decoding, translation and execution support, Lawrence Hunter, 2023/01/19
- [RFC PATCH 20/39] target/riscv: Add vaesem.vs decoding, translation and execution support, Lawrence Hunter, 2023/01/19
- [RFC PATCH 14/39] target/riscv: Add vaesdf.vv decoding, translation and execution support,
Lawrence Hunter <=
- [RFC PATCH 06/39] target/riscv: Add vrol.[vv, vx] and vror.[vv, vx, vi] decoding, translation and execution support, Lawrence Hunter, 2023/01/19
- [RFC PATCH 05/39] target/riscv: Add vclmulh.vx decoding, translation and execution support, Lawrence Hunter, 2023/01/19
- [RFC PATCH 17/39] target/riscv: Add vaesdm.vs decoding, translation and execution support, Lawrence Hunter, 2023/01/19
- [RFC PATCH 11/39] target/riscv: add zvkns cpu property, Lawrence Hunter, 2023/01/19
- [RFC PATCH 28/39] target/riscv: add zvksh cpu property, Lawrence Hunter, 2023/01/19
- [RFC PATCH 25/39] target/riscv: Add vsha2ms.vv decoding, translation and execution support, Lawrence Hunter, 2023/01/19
- [RFC PATCH 27/39] target/riscv: expose zvknh cpu properties, Lawrence Hunter, 2023/01/19
- [RFC PATCH 10/39] target/riscv: expose zvkb cpu property, Lawrence Hunter, 2023/01/19
- [RFC PATCH 18/39] target/riscv: Add vaesz.vs decoding, translation and execution support, Lawrence Hunter, 2023/01/19
- [RFC PATCH 12/39] target/riscv: Add vaesef.vv decoding, translation and execution support, Lawrence Hunter, 2023/01/19
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