Re: [PATCH v3 3/7] hw/riscv/microchip_pfsoc.c: add an Icicle Kit fdt address function

[Daniel Henrique Barboza]

On 1/19/23 16:56, Conor Dooley wrote:
> Hey!
>
> On Thu, Jan 19, 2023 at 04:17:24PM -0300, Daniel Henrique Barboza wrote:
> > The Icicle Kit board works with 2 distinct RAM banks that are separated
> > by a gap. We have a lower bank with 1GiB size, a gap follows,
> > then at 64GiB the high memory starts.
> >
> > MachineClass::default_ram_size is set to 1.5Gb and machine_init() is
> > enforcing it as minimal RAM size, meaning that there we'll always have
> > at least 512 MiB in the Hi RAM area, and that the FDT will be located
> > there all the time.
> >
> > riscv_compute_fdt_addr() can't handle this setup because it assumes that
> > the RAM is always contiguous. It's also returning an uint32_t because
> > it's enforcing that fdt address is sitting on an area that is addressable
> > to 32 bit CPUs, but 32 bits won't be enough to point to the Hi area of
> > the Icicle Kit RAM (and to its FDT itself).
> >
> > Create a new function called microchip_compute_fdt_addr() that is able
> > to deal with all these details that are particular to the Icicle Kit.
> > Ditch riscv_compute_fdt_addr() and use it instead.
> Hmm, this breaks boot for me in what is a valid configuration for
> Icicle/PolarFire SoC which was previously functional in QEMU.

Thanks for letting me know.  Are you testing it by using the command line
you mentioned in the "qemu icicle kit es" thread?

$(QEMU)/qemu-system-riscv64 \
        -M microchip-icicle-kit \
        -m 2G -smp 5 \
        -kernel $(vmlinux_bin) \
        -dtb $(devkit).dtb \
        -initrd $(initramfs) \
        -display none \
        -serial null \
        -serial stdio




Thanks,

Daniel

> I'll try and write another email explaining things in more detail, but
> in case I do not have time to get that done in the next day or two I
> figured I should let you know.
>
> Thanks,
> Conor.