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Re: [PATCH v3 12/14] RISC-V: Add initial support for T-Head C906
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From: |
Christoph Müllner |
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Subject: |
Re: [PATCH v3 12/14] RISC-V: Add initial support for T-Head C906 |
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Date: |
Tue, 31 Jan 2023 19:01:54 +0100 |
On Tue, Jan 24, 2023 at 10:26 PM Richard Henderson
<richard.henderson@linaro.org> wrote:
>
> On 1/24/23 09:59, Christoph Muellner wrote:
> > +++ b/target/riscv/cpu.h
> > @@ -27,6 +27,7 @@
> > #include "qom/object.h"
> > #include "qemu/int128.h"
> > #include "cpu_bits.h"
> > +#include "cpu_vendorid.h"
>
> I don't see that this ID is required for all users of riscv/cpu.h.
> This include should be limited to cpu.c.
Fixed in v4.
Thank you!
>
>
> r~
- [PATCH v3 10/14] RISC-V: Adding T-Head FMemIdx extension, (continued)
- [PATCH v3 10/14] RISC-V: Adding T-Head FMemIdx extension, Christoph Muellner, 2023/01/24
- [PATCH v3 09/14] RISC-V: Adding T-Head MemIdx extension, Christoph Muellner, 2023/01/24
- [PATCH v3 13/14] RISC-V: Adding XTheadFmv ISA extension, Christoph Muellner, 2023/01/24
- [PATCH v3 11/14] RISC-V: Set minimum priv version for Zfh to 1.11, Christoph Muellner, 2023/01/24
- [PATCH v3 12/14] RISC-V: Add initial support for T-Head C906, Christoph Muellner, 2023/01/24
- [PATCH v3 14/14] target/riscv: add a MAINTAINERS entry for XThead* extension support, Christoph Muellner, 2023/01/24