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[PATCH v6 12/12] target/riscv: Deny access if access is partially inside
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From: |
Weiwei Li |
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Subject: |
[PATCH v6 12/12] target/riscv: Deny access if access is partially inside the PMP entry |
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Date: |
Wed, 17 May 2023 17:15:19 +0800 |
Access will fail if access is partially inside the PMP entry.
However,only setting ret = false doesn't really mean pmp violation
since pmp_hart_has_privs_default() may return true at the end of
pmp_hart_has_privs().
Signed-off-by: Weiwei Li <liweiwei@iscas.ac.cn>
Signed-off-by: Junqiang Wang <wangjunqiang@iscas.ac.cn>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
---
target/riscv/pmp.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/target/riscv/pmp.c b/target/riscv/pmp.c
index 90bde7609c..8b66b1bb7a 100644
--- a/target/riscv/pmp.c
+++ b/target/riscv/pmp.c
@@ -327,8 +327,8 @@ bool pmp_hart_has_privs(CPURISCVState *env, target_ulong
addr,
if ((s + e) == 1) {
qemu_log_mask(LOG_GUEST_ERROR,
"pmp violation - access is partially inside\n");
- ret = false;
- break;
+ *allowed_privs = 0;
+ return false;
}
/* fully inside */
--
2.25.1
- [PATCH v6 04/12] target/riscv: Change the return type of pmp_hart_has_privs() to bool, (continued)
- [PATCH v6 04/12] target/riscv: Change the return type of pmp_hart_has_privs() to bool, Weiwei Li, 2023/05/17
- [PATCH v6 06/12] target/riscv: Remove unused paramters in pmp_hart_has_privs_default(), Weiwei Li, 2023/05/17
- [PATCH v6 07/12] target/riscv: Flush TLB when MMWP or MML bits are changed, Weiwei Li, 2023/05/17
- [PATCH v6 01/12] target/riscv: Update pmp_get_tlb_size(), Weiwei Li, 2023/05/17
- [PATCH v6 03/12] target/riscv: Make the short cut really work in pmp_hart_has_privs, Weiwei Li, 2023/05/17
- [PATCH v6 05/12] target/riscv: Make RLB/MML/MMWP bits writable only when Smepmp is enabled, Weiwei Li, 2023/05/17
- [PATCH v6 02/12] target/riscv: Move pmp_get_tlb_size apart from get_physical_address_pmp, Weiwei Li, 2023/05/17
- [PATCH v6 08/12] target/riscv: Update the next rule addr in pmpaddr_csr_write(), Weiwei Li, 2023/05/17
- [PATCH v6 09/12] target/riscv: Flush TLB when pmpaddr is updated, Weiwei Li, 2023/05/17
- [PATCH v6 10/12] target/riscv: Flush TLB only when pmpcfg/pmpaddr really changes, Weiwei Li, 2023/05/17
- [PATCH v6 12/12] target/riscv: Deny access if access is partially inside the PMP entry,
Weiwei Li <=
- [PATCH v6 11/12] target/riscv: Separate pmp_update_rule() in pmpcfg_csr_write, Weiwei Li, 2023/05/17
- Re: [PATCH v6 00/12] target/riscv: Fix PMP related problem, Alistair Francis, 2023/05/18