[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
Re: [PATCH 3/5] hw/riscv/opentitan: Add TYPE_OPENTITAN_MACHINE definitio
From: |
Alistair Francis |
Subject: |
Re: [PATCH 3/5] hw/riscv/opentitan: Add TYPE_OPENTITAN_MACHINE definition |
Date: |
Thu, 25 May 2023 12:16:59 +1000 |
On Sat, May 20, 2023 at 3:46 PM Philippe Mathieu-Daudé
<philmd@linaro.org> wrote:
>
> QOM type names are usually defined as TYPE_FOO.
>
> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Alistair
> ---
> include/hw/riscv/opentitan.h | 2 ++
> hw/riscv/opentitan.c | 2 +-
> 2 files changed, 3 insertions(+), 1 deletion(-)
>
> diff --git a/include/hw/riscv/opentitan.h b/include/hw/riscv/opentitan.h
> index c40b05052a..fd70226ed8 100644
> --- a/include/hw/riscv/opentitan.h
> +++ b/include/hw/riscv/opentitan.h
> @@ -53,6 +53,8 @@ struct LowRISCIbexSoCState {
> MemoryRegion flash_alias;
> };
>
> +#define TYPE_OPENTITAN_MACHINE "opentitan"
> +
> typedef struct OpenTitanState {
> /*< private >*/
> SysBusDevice parent_obj;
> diff --git a/hw/riscv/opentitan.c b/hw/riscv/opentitan.c
> index 294955eeea..7d7159ea30 100644
> --- a/hw/riscv/opentitan.c
> +++ b/hw/riscv/opentitan.c
> @@ -118,7 +118,7 @@ static void opentitan_machine_class_init(MachineClass *mc)
> mc->default_ram_size = ibex_memmap[IBEX_DEV_RAM].size;
> }
>
> -DEFINE_MACHINE("opentitan", opentitan_machine_class_init)
> +DEFINE_MACHINE(TYPE_OPENTITAN_MACHINE, opentitan_machine_class_init)
>
> static void lowrisc_ibex_soc_init(Object *obj)
> {
> --
> 2.38.1
>
>
- [PATCH 0/5] hw/riscv/opentitan: Correct QOM type/size of OpenTitanState, Philippe Mathieu-Daudé, 2023/05/20
- [PATCH 2/5] hw/riscv/opentitan: Declare QOM types using DEFINE_TYPES() macro, Philippe Mathieu-Daudé, 2023/05/20
- [PATCH 1/5] hw/riscv/opentitan: Rename machine_[class]_init() functions, Philippe Mathieu-Daudé, 2023/05/20
- [PATCH 3/5] hw/riscv/opentitan: Add TYPE_OPENTITAN_MACHINE definition, Philippe Mathieu-Daudé, 2023/05/20
- [PATCH 4/5] hw/riscv/opentitan: Explicit machine type definition, Philippe Mathieu-Daudé, 2023/05/20
- [PATCH 5/5] hw/riscv/opentitan: Correct OpenTitanState parent type/size, Philippe Mathieu-Daudé, 2023/05/20
- Re: [PATCH 0/5] hw/riscv/opentitan: Correct QOM type/size of OpenTitanState, Alistair Francis, 2023/05/24