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Re: [PATCH v9 00/20] target/riscv, KVM: fixes and enhancements


From: Alistair Francis
Subject: Re: [PATCH v9 00/20] target/riscv, KVM: fixes and enhancements
Date: Mon, 10 Jul 2023 12:48:28 +1000

On Thu, Jul 6, 2023 at 8:19 PM Daniel Henrique Barboza
<dbarboza@ventanamicro.com> wrote:
>
> Hi,
>
> In this version we dialed back from our design decision in patch 14,
> returning to the design we've been using since the first version. The
> rationale behind is that we can't get rid of EINVAL since it will break
> extension for all other KVM versions prior to this one where we're
> adding the first version of the KVM specific capabilities. We'll switch
> later on for get-reg-list when it's available, but for now we're stuck
> with EINVAL. Drew provided a detailed explanation here:
>
> https://lore.kernel.org/qemu-devel/20230706-38ab9f9705448bb10413f1af@orel/T/#m75a5323e76518c02598758fdd6a8943951812875
>
> As a bonus I also fixed the device-tree binding link satp in patch 2 like
> Connor suggested.
>
> I believe we're ready to go.
>
> Patches missing review: 14
>
> Changes from v8:
>   - patch 2:
>     - fix device-tree binding link in commit message
>   - patch 14:
>     - use EINVAL instead of ENOENT
> v8 link: 
> https://lore.kernel.org/qemu-devel/20230706-38ab9f9705448bb10413f1af@orel/T/#m1c889304847598789db313f3e0854ed0d41ce60c
>
> Daniel Henrique Barboza (20):
>   target/riscv: skip features setup for KVM CPUs
>   hw/riscv/virt.c: skip 'mmu-type' FDT if satp mode not set
>   target/riscv/cpu.c: restrict 'mvendorid' value
>   target/riscv/cpu.c: restrict 'mimpid' value
>   target/riscv/cpu.c: restrict 'marchid' value
>   target/riscv: use KVM scratch CPUs to init KVM properties
>   target/riscv: read marchid/mimpid in kvm_riscv_init_machine_ids()
>   target/riscv: handle mvendorid/marchid/mimpid for KVM CPUs
>   linux-headers: Update to v6.4-rc1
>   target/riscv/kvm.c: init 'misa_ext_mask' with scratch CPU
>   target/riscv/cpu: add misa_ext_info_arr[]
>   target/riscv: add KVM specific MISA properties
>   target/riscv/kvm.c: update KVM MISA bits
>   target/riscv/kvm.c: add multi-letter extension KVM properties
>   target/riscv/cpu.c: add satp_mode properties earlier
>   target/riscv/cpu.c: remove priv_ver check from riscv_isa_string_ext()
>   target/riscv/cpu.c: create KVM mock properties
>   target/riscv: update multi-letter extension KVM properties
>   target/riscv/kvm.c: add kvmconfig_get_cfg_addr() helper
>   target/riscv/kvm.c: read/write (cbom|cboz)_blocksize in KVM

Thanks!

Applied to riscv-to-apply.next

Alistair

>
>  hw/riscv/virt.c                               |  14 +-
>  include/standard-headers/linux/const.h        |   2 +-
>  include/standard-headers/linux/virtio_blk.h   |  18 +-
>  .../standard-headers/linux/virtio_config.h    |   6 +
>  include/standard-headers/linux/virtio_net.h   |   1 +
>  linux-headers/asm-arm64/kvm.h                 |  33 ++
>  linux-headers/asm-riscv/kvm.h                 |  53 +-
>  linux-headers/asm-riscv/unistd.h              |   9 +
>  linux-headers/asm-s390/unistd_32.h            |   1 +
>  linux-headers/asm-s390/unistd_64.h            |   1 +
>  linux-headers/asm-x86/kvm.h                   |   3 +
>  linux-headers/linux/const.h                   |   2 +-
>  linux-headers/linux/kvm.h                     |  12 +-
>  linux-headers/linux/psp-sev.h                 |   7 +
>  linux-headers/linux/userfaultfd.h             |  17 +-
>  target/riscv/cpu.c                            | 341 ++++++++++--
>  target/riscv/cpu.h                            |   7 +-
>  target/riscv/kvm.c                            | 499 +++++++++++++++++-
>  target/riscv/kvm_riscv.h                      |   1 +
>  19 files changed, 940 insertions(+), 87 deletions(-)
>
> --
> 2.41.0
>
>



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