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[PATCH v3 05/16] target/riscv: Move sysemu-specific files to target/risc
From: |
Philippe Mathieu-Daudé |
Subject: |
[PATCH v3 05/16] target/riscv: Move sysemu-specific files to target/riscv/sysemu/ |
Date: |
Tue, 11 Jul 2023 14:14:42 +0200 |
Move sysemu-specific files to the a new 'sysemu' sub-directory,
adapt meson rules.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
Acked-by: Alistair Francis <alistair.francis@wdc.com>
---
target/riscv/cpu.h | 2 +-
target/riscv/{ => sysemu}/instmap.h | 0
target/riscv/{ => sysemu}/kvm_riscv.h | 0
target/riscv/{ => sysemu}/pmp.h | 0
target/riscv/{ => sysemu}/pmu.h | 0
target/riscv/{ => sysemu}/time_helper.h | 0
hw/riscv/virt.c | 2 +-
target/riscv/cpu.c | 6 ++---
target/riscv/cpu_helper.c | 4 +--
target/riscv/csr.c | 4 +--
target/riscv/{ => sysemu}/arch_dump.c | 0
target/riscv/sysemu/kvm-stub.c | 30 ++++++++++++++++++++++
target/riscv/{ => sysemu}/kvm.c | 0
target/riscv/{ => sysemu}/machine.c | 0
target/riscv/{ => sysemu}/monitor.c | 0
target/riscv/{ => sysemu}/pmp.c | 0
target/riscv/{ => sysemu}/pmu.c | 0
target/riscv/{ => sysemu}/riscv-qmp-cmds.c | 0
target/riscv/{ => sysemu}/time_helper.c | 0
target/riscv/meson.build | 13 +++-------
target/riscv/sysemu/meson.build | 11 ++++++++
21 files changed, 54 insertions(+), 18 deletions(-)
rename target/riscv/{ => sysemu}/instmap.h (100%)
rename target/riscv/{ => sysemu}/kvm_riscv.h (100%)
rename target/riscv/{ => sysemu}/pmp.h (100%)
rename target/riscv/{ => sysemu}/pmu.h (100%)
rename target/riscv/{ => sysemu}/time_helper.h (100%)
rename target/riscv/{ => sysemu}/arch_dump.c (100%)
create mode 100644 target/riscv/sysemu/kvm-stub.c
rename target/riscv/{ => sysemu}/kvm.c (100%)
rename target/riscv/{ => sysemu}/machine.c (100%)
rename target/riscv/{ => sysemu}/monitor.c (100%)
rename target/riscv/{ => sysemu}/pmp.c (100%)
rename target/riscv/{ => sysemu}/pmu.c (100%)
rename target/riscv/{ => sysemu}/riscv-qmp-cmds.c (100%)
rename target/riscv/{ => sysemu}/time_helper.c (100%)
create mode 100644 target/riscv/sysemu/meson.build
diff --git a/target/riscv/cpu.h b/target/riscv/cpu.h
index 6ea22e0eea..dba78db644 100644
--- a/target/riscv/cpu.h
+++ b/target/riscv/cpu.h
@@ -93,7 +93,7 @@ typedef enum {
#define MAX_RISCV_PMPS (16)
#if !defined(CONFIG_USER_ONLY)
-#include "pmp.h"
+#include "sysemu/pmp.h"
#include "debug.h"
#endif
diff --git a/target/riscv/instmap.h b/target/riscv/sysemu/instmap.h
similarity index 100%
rename from target/riscv/instmap.h
rename to target/riscv/sysemu/instmap.h
diff --git a/target/riscv/kvm_riscv.h b/target/riscv/sysemu/kvm_riscv.h
similarity index 100%
rename from target/riscv/kvm_riscv.h
rename to target/riscv/sysemu/kvm_riscv.h
diff --git a/target/riscv/pmp.h b/target/riscv/sysemu/pmp.h
similarity index 100%
rename from target/riscv/pmp.h
rename to target/riscv/sysemu/pmp.h
diff --git a/target/riscv/pmu.h b/target/riscv/sysemu/pmu.h
similarity index 100%
rename from target/riscv/pmu.h
rename to target/riscv/sysemu/pmu.h
diff --git a/target/riscv/time_helper.h b/target/riscv/sysemu/time_helper.h
similarity index 100%
rename from target/riscv/time_helper.h
rename to target/riscv/sysemu/time_helper.h
diff --git a/hw/riscv/virt.c b/hw/riscv/virt.c
index d90286dc46..74f789a85b 100644
--- a/hw/riscv/virt.c
+++ b/hw/riscv/virt.c
@@ -30,7 +30,7 @@
#include "hw/char/serial.h"
#include "target/riscv/cpu.h"
#include "hw/core/sysbus-fdt.h"
-#include "target/riscv/pmu.h"
+#include "target/riscv/sysemu/pmu.h"
#include "hw/riscv/riscv_hart.h"
#include "hw/riscv/virt.h"
#include "hw/riscv/boot.h"
diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c
index faf703afcb..91433f3041 100644
--- a/target/riscv/cpu.c
+++ b/target/riscv/cpu.c
@@ -24,11 +24,11 @@
#include "cpu.h"
#include "cpu_vendorid.h"
#ifndef CONFIG_USER_ONLY
-#include "pmu.h"
-#include "time_helper.h"
+#include "sysemu/pmu.h"
+#include "sysemu/time_helper.h"
#include "sysemu/tcg.h"
#include "sysemu/kvm.h"
-#include "kvm_riscv.h"
+#include "sysemu/kvm_riscv.h"
#endif
#include "internals.h"
#include "exec/exec-all.h"
diff --git a/target/riscv/cpu_helper.c b/target/riscv/cpu_helper.c
index e8b7f70be3..0adde26321 100644
--- a/target/riscv/cpu_helper.c
+++ b/target/riscv/cpu_helper.c
@@ -22,9 +22,9 @@
#include "qemu/main-loop.h"
#include "cpu.h"
#include "internals.h"
-#include "pmu.h"
+#include "sysemu/pmu.h"
#include "exec/exec-all.h"
-#include "instmap.h"
+#include "sysemu/instmap.h"
#include "tcg/tcg-op.h"
#include "trace.h"
#include "semihosting/common-semi.h"
diff --git a/target/riscv/csr.c b/target/riscv/csr.c
index e5737dcf58..29151429ee 100644
--- a/target/riscv/csr.c
+++ b/target/riscv/csr.c
@@ -22,8 +22,8 @@
#include "qemu/timer.h"
#include "cpu.h"
#ifndef CONFIG_USER_ONLY
-#include "pmu.h"
-#include "time_helper.h"
+#include "sysemu/pmu.h"
+#include "sysemu/time_helper.h"
#endif
#include "qemu/main-loop.h"
#include "exec/exec-all.h"
diff --git a/target/riscv/arch_dump.c b/target/riscv/sysemu/arch_dump.c
similarity index 100%
rename from target/riscv/arch_dump.c
rename to target/riscv/sysemu/arch_dump.c
diff --git a/target/riscv/sysemu/kvm-stub.c b/target/riscv/sysemu/kvm-stub.c
new file mode 100644
index 0000000000..4e8fc31a21
--- /dev/null
+++ b/target/riscv/sysemu/kvm-stub.c
@@ -0,0 +1,30 @@
+/*
+ * QEMU KVM RISC-V specific function stubs
+ *
+ * Copyright (c) 2020 Huawei Technologies Co., Ltd
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms and conditions of the GNU General Public License,
+ * version 2 or later, as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program. If not, see <http://www.gnu.org/licenses/>.
+ */
+#include "qemu/osdep.h"
+#include "cpu.h"
+#include "kvm_riscv.h"
+
+void kvm_riscv_reset_vcpu(RISCVCPU *cpu)
+{
+ abort();
+}
+
+void kvm_riscv_set_irq(RISCVCPU *cpu, int irq, int level)
+{
+ abort();
+}
diff --git a/target/riscv/kvm.c b/target/riscv/sysemu/kvm.c
similarity index 100%
rename from target/riscv/kvm.c
rename to target/riscv/sysemu/kvm.c
diff --git a/target/riscv/machine.c b/target/riscv/sysemu/machine.c
similarity index 100%
rename from target/riscv/machine.c
rename to target/riscv/sysemu/machine.c
diff --git a/target/riscv/monitor.c b/target/riscv/sysemu/monitor.c
similarity index 100%
rename from target/riscv/monitor.c
rename to target/riscv/sysemu/monitor.c
diff --git a/target/riscv/pmp.c b/target/riscv/sysemu/pmp.c
similarity index 100%
rename from target/riscv/pmp.c
rename to target/riscv/sysemu/pmp.c
diff --git a/target/riscv/pmu.c b/target/riscv/sysemu/pmu.c
similarity index 100%
rename from target/riscv/pmu.c
rename to target/riscv/sysemu/pmu.c
diff --git a/target/riscv/riscv-qmp-cmds.c
b/target/riscv/sysemu/riscv-qmp-cmds.c
similarity index 100%
rename from target/riscv/riscv-qmp-cmds.c
rename to target/riscv/sysemu/riscv-qmp-cmds.c
diff --git a/target/riscv/time_helper.c b/target/riscv/sysemu/time_helper.c
similarity index 100%
rename from target/riscv/time_helper.c
rename to target/riscv/sysemu/time_helper.c
diff --git a/target/riscv/meson.build b/target/riscv/meson.build
index e3ab3df4e5..8967dfaded 100644
--- a/target/riscv/meson.build
+++ b/target/riscv/meson.build
@@ -7,6 +7,8 @@ gen = [
]
riscv_ss = ss.source_set()
+riscv_system_ss = ss.source_set()
+
riscv_ss.add(gen)
riscv_ss.add(files(
'cpu.c',
@@ -22,19 +24,12 @@ riscv_ss.add(files(
'crypto_helper.c',
'zce_helper.c'
))
-riscv_ss.add(when: 'CONFIG_KVM', if_true: files('kvm.c'))
-riscv_system_ss = ss.source_set()
riscv_system_ss.add(files(
- 'arch_dump.c',
- 'pmp.c',
'debug.c',
- 'monitor.c',
- 'machine.c',
- 'pmu.c',
- 'time_helper.c',
- 'riscv-qmp-cmds.c',
))
+subdir('sysemu')
+
target_arch += {'riscv': riscv_ss}
target_softmmu_arch += {'riscv': riscv_system_ss}
diff --git a/target/riscv/sysemu/meson.build b/target/riscv/sysemu/meson.build
new file mode 100644
index 0000000000..64de0256a5
--- /dev/null
+++ b/target/riscv/sysemu/meson.build
@@ -0,0 +1,11 @@
+riscv_system_ss.add(files(
+ 'arch_dump.c',
+ 'machine.c',
+ 'monitor.c',
+ 'pmp.c',
+ 'pmu.c',
+ 'riscv-qmp-cmds.c',
+ 'time_helper.c',
+))
+
+riscv_ss.add(when: 'CONFIG_KVM', if_true: files('kvm.c'))
--
2.38.1
- [PATCH-for-8.2 v3 00/16] target/riscv: Allow building without TCG (KVM-only so far), Philippe Mathieu-Daudé, 2023/07/11
- [PATCH v3 01/16] target/riscv: Remove unuseful KVM stubs, Philippe Mathieu-Daudé, 2023/07/11
- [PATCH v3 02/16] target/riscv: Remove unused 'instmap.h' header in translate.c, Philippe Mathieu-Daudé, 2023/07/11
- [PATCH v3 03/16] target/riscv: Restrict sysemu specific header to user emulation, Philippe Mathieu-Daudé, 2023/07/11
- [PATCH v3 05/16] target/riscv: Move sysemu-specific files to target/riscv/sysemu/,
Philippe Mathieu-Daudé <=
- [PATCH v3 04/16] target/riscv: Restrict 'rv128' machine to TCG accelerator, Philippe Mathieu-Daudé, 2023/07/11
- [PATCH v3 06/16] target/riscv: Restrict riscv_cpu_do_interrupt() to sysemu, Philippe Mathieu-Daudé, 2023/07/11
- [PATCH v3 08/16] target/riscv: Move TCG-specific cpu_get_tb_cpu_state() to tcg/cpu.c, Philippe Mathieu-Daudé, 2023/07/11
- [PATCH v3 07/16] target/riscv: Move TCG-specific files to target/riscv/tcg/, Philippe Mathieu-Daudé, 2023/07/11
- [PATCH v3 10/16] target/riscv: Extract TCG-specific code from debug.c, Philippe Mathieu-Daudé, 2023/07/11
- [PATCH v3 09/16] target/riscv: Expose some 'trigger' prototypes from debug.c, Philippe Mathieu-Daudé, 2023/07/11