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Re: [PATCH v5 5/5] target/riscv: select KVM AIA in riscv virt machine
From: |
Andrew Jones |
Subject: |
Re: [PATCH v5 5/5] target/riscv: select KVM AIA in riscv virt machine |
Date: |
Thu, 13 Jul 2023 11:58:18 +0200 |
On Thu, Jul 13, 2023 at 08:43:57AM +0000, Yong-Xuan Wang wrote:
> Select KVM AIA when the host kernel has in-kernel AIA chip support.
> Since KVM AIA only has one APLIC instance, we map the QEMU APLIC
> devices to KVM APLIC.
> We also extend virt machine to specify the KVM AIA mode. The "kvm-aia"
> parameter is passed along with machine name in QEMU command-line.
> 1) "kvm-aia=emul": IMSIC is emulated by hypervisor
> 2) "kvm-aia=hwaccel": use hardware guest IMSIC
> 3) "kvm-aia=auto": use the hardware guest IMSICs whenever available
> otherwise we fallback to software emulation.
>
> Signed-off-by: Yong-Xuan Wang <yongxuan.wang@sifive.com>
> Reviewed-by: Jim Shu <jim.shu@sifive.com>
> Reviewed-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
> ---
> hw/riscv/virt.c | 125 ++++++++++++++++++++++++++++++----------
> include/hw/riscv/virt.h | 1 +
> 2 files changed, 97 insertions(+), 29 deletions(-)
>
> diff --git a/hw/riscv/virt.c b/hw/riscv/virt.c
> index 26b3aff28e..b74142d978 100644
> --- a/hw/riscv/virt.c
> +++ b/hw/riscv/virt.c
> @@ -35,6 +35,7 @@
> #include "hw/riscv/virt.h"
> #include "hw/riscv/boot.h"
> #include "hw/riscv/numa.h"
> +#include "kvm_riscv.h"
> #include "hw/intc/riscv_aclint.h"
> #include "hw/intc/riscv_aplic.h"
> #include "hw/intc/riscv_imsic.h"
> @@ -75,6 +76,12 @@
> #error "Can't accomodate all IMSIC groups in address space"
> #endif
>
> +/* KVM AIA only supports APLIC MSI. APLIC Wired is always emulated by QEMU.
> */
> +static bool virt_use_kvm_aia(RISCVVirtState *s)
> +{
> + return kvm_irqchip_in_kernel() && s->aia_type ==
> VIRT_AIA_TYPE_APLIC_IMSIC;
> +}
> +
> static const MemMapEntry virt_memmap[] = {
> [VIRT_DEBUG] = { 0x0, 0x100 },
> [VIRT_MROM] = { 0x1000, 0xf000 },
> @@ -609,16 +616,16 @@ static void create_fdt_one_aplic(RISCVVirtState *s, int
> socket,
> uint32_t *intc_phandles,
> uint32_t aplic_phandle,
> uint32_t aplic_child_phandle,
> - bool m_mode)
> + bool m_mode, int num_harts)
> {
> int cpu;
> char *aplic_name;
> uint32_t *aplic_cells;
> MachineState *ms = MACHINE(s);
>
> - aplic_cells = g_new0(uint32_t, s->soc[socket].num_harts * 2);
> + aplic_cells = g_new0(uint32_t, num_harts * 2);
>
> - for (cpu = 0; cpu < s->soc[socket].num_harts; cpu++) {
> + for (cpu = 0; cpu < num_harts; cpu++) {
> aplic_cells[cpu * 2 + 0] = cpu_to_be32(intc_phandles[cpu]);
> aplic_cells[cpu * 2 + 1] = cpu_to_be32(m_mode ? IRQ_M_EXT :
> IRQ_S_EXT);
> }
> @@ -632,7 +639,7 @@ static void create_fdt_one_aplic(RISCVVirtState *s, int
> socket,
>
> if (s->aia_type == VIRT_AIA_TYPE_APLIC) {
> qemu_fdt_setprop(ms->fdt, aplic_name, "interrupts-extended",
> - aplic_cells, s->soc[socket].num_harts * sizeof(uint32_t) * 2);
> + aplic_cells, num_harts * sizeof(uint32_t) * 2);
> } else {
> qemu_fdt_setprop_cell(ms->fdt, aplic_name, "msi-parent",
> msi_phandle);
> }
> @@ -662,7 +669,8 @@ static void create_fdt_socket_aplic(RISCVVirtState *s,
> uint32_t msi_s_phandle,
> uint32_t *phandle,
> uint32_t *intc_phandles,
> - uint32_t *aplic_phandles)
> + uint32_t *aplic_phandles,
> + int num_harts)
> {
> char *aplic_name;
> unsigned long aplic_addr;
> @@ -679,7 +687,7 @@ static void create_fdt_socket_aplic(RISCVVirtState *s,
> create_fdt_one_aplic(s, socket, aplic_addr,
> memmap[VIRT_APLIC_M].size,
> msi_m_phandle, intc_phandles,
> aplic_m_phandle, aplic_s_phandle,
> - true);
> + true, num_harts);
> }
>
> /* S-level APLIC node */
> @@ -688,7 +696,7 @@ static void create_fdt_socket_aplic(RISCVVirtState *s,
> create_fdt_one_aplic(s, socket, aplic_addr, memmap[VIRT_APLIC_S].size,
> msi_s_phandle, intc_phandles,
> aplic_s_phandle, 0,
> - false);
> + false, num_harts);
>
> aplic_name = g_strdup_printf("/soc/aplic@%lx", aplic_addr);
>
> @@ -772,34 +780,48 @@ static void create_fdt_sockets(RISCVVirtState *s, const
> MemMapEntry *memmap,
> *msi_pcie_phandle = msi_s_phandle;
> }
>
> - phandle_pos = ms->smp.cpus;
> - for (socket = (socket_count - 1); socket >= 0; socket--) {
> - phandle_pos -= s->soc[socket].num_harts;
> + /* KVM AIA only has one APLIC instance */
> + if (virt_use_kvm_aia(s)) {
> + create_fdt_socket_aplic(s, memmap, 0,
> + msi_m_phandle, msi_s_phandle, phandle,
> + &intc_phandles[0], xplic_phandles, ms->smp.cpus);
> + } else {
> + phandle_pos = ms->smp.cpus;
> + for (socket = (socket_count - 1); socket >= 0; socket--) {
> + phandle_pos -= s->soc[socket].num_harts;
>
> - if (s->aia_type == VIRT_AIA_TYPE_NONE) {
> - create_fdt_socket_plic(s, memmap, socket, phandle,
> - &intc_phandles[phandle_pos], xplic_phandles);
> - } else {
> - create_fdt_socket_aplic(s, memmap, socket,
> - msi_m_phandle, msi_s_phandle, phandle,
> - &intc_phandles[phandle_pos], xplic_phandles);
> + if (s->aia_type == VIRT_AIA_TYPE_NONE) {
> + create_fdt_socket_plic(s, memmap, socket, phandle,
> + &intc_phandles[phandle_pos], xplic_phandles);
> + } else {
> + create_fdt_socket_aplic(s, memmap, socket,
> + msi_m_phandle, msi_s_phandle, phandle,
> + &intc_phandles[phandle_pos], xplic_phandles,
> + s->soc[socket].num_harts);
> + }
> }
> }
>
> g_free(intc_phandles);
>
> - for (socket = 0; socket < socket_count; socket++) {
> - if (socket == 0) {
> - *irq_mmio_phandle = xplic_phandles[socket];
> - *irq_virtio_phandle = xplic_phandles[socket];
> - *irq_pcie_phandle = xplic_phandles[socket];
> - }
> - if (socket == 1) {
> - *irq_virtio_phandle = xplic_phandles[socket];
> - *irq_pcie_phandle = xplic_phandles[socket];
> - }
> - if (socket == 2) {
> - *irq_pcie_phandle = xplic_phandles[socket];
> + if (virt_use_kvm_aia(s)) {
> + *irq_mmio_phandle = xplic_phandles[0];
> + *irq_virtio_phandle = xplic_phandles[0];
> + *irq_pcie_phandle = xplic_phandles[0];
> + } else {
> + for (socket = 0; socket < socket_count; socket++) {
> + if (socket == 0) {
> + *irq_mmio_phandle = xplic_phandles[socket];
> + *irq_virtio_phandle = xplic_phandles[socket];
> + *irq_pcie_phandle = xplic_phandles[socket];
> + }
> + if (socket == 1) {
> + *irq_virtio_phandle = xplic_phandles[socket];
> + *irq_pcie_phandle = xplic_phandles[socket];
> + }
> + if (socket == 2) {
> + *irq_pcie_phandle = xplic_phandles[socket];
> + }
> }
> }
>
> @@ -1430,6 +1452,14 @@ static void virt_machine_init(MachineState *machine)
> }
> }
>
> + if (virt_use_kvm_aia(s)) {
> + kvm_riscv_aia_create(
> + machine, s->kvm_aia_mode, IMSIC_MMIO_GROUP_MIN_SHIFT,
> + VIRT_IRQCHIP_NUM_SOURCES, VIRT_IRQCHIP_NUM_MSIS,
> + memmap[VIRT_APLIC_S].base, memmap[VIRT_IMSIC_S].base,
> + s->aia_guests);
> + }
> +
> if (riscv_is_32bit(&s->soc[0])) {
> #if HOST_LONG_BITS == 64
> /* limit RAM size in a 32-bit system */
> @@ -1575,6 +1605,31 @@ static void virt_set_aia(Object *obj, const char *val,
> Error **errp)
> }
> }
>
> +#if defined(CONFIG_KVM)
> +static char *virt_get_kvm_aia(Object *obj, Error **errp)
> +{
> + RISCVVirtState *s = RISCV_VIRT_MACHINE(obj);
> +
> + return g_strdup(kvm_aia_mode_str(s->kvm_aia_mode));
> +}
> +
> +static void virt_set_kvm_aia(Object *obj, const char *val, Error **errp)
> +{
> + RISCVVirtState *s = RISCV_VIRT_MACHINE(obj);
> +
> + if (!strcmp(val, "emul")) {
> + s->kvm_aia_mode = KVM_DEV_RISCV_AIA_MODE_EMUL;
> + } else if (!strcmp(val, "hwaccel")) {
> + s->kvm_aia_mode = KVM_DEV_RISCV_AIA_MODE_HWACCEL;
> + } else if (!strcmp(val, "auto")) {
> + s->kvm_aia_mode = KVM_DEV_RISCV_AIA_MODE_AUTO;
> + } else {
> + error_setg(errp, "Invalid KVM AIA mode");
> + error_append_hint(errp, "Valid values are emul, hwaccel, and
> auto.\n");
> + }
> +}
> +#endif
> +
> static bool virt_get_aclint(Object *obj, Error **errp)
> {
> RISCVVirtState *s = RISCV_VIRT_MACHINE(obj);
> @@ -1685,6 +1740,18 @@ static void virt_machine_class_init(ObjectClass *oc,
> void *data)
> sprintf(str, "Set number of guest MMIO pages for AIA IMSIC. Valid value "
> "should be between 0 and %d.", VIRT_IRQCHIP_MAX_GUESTS);
> object_class_property_set_description(oc, "aia-guests", str);
> +
> +#if defined(CONFIG_KVM)
> + object_class_property_add_str(oc, "kvm-aia", virt_get_kvm_aia,
> + virt_set_kvm_aia);
> + object_class_property_set_description(oc, "kvm-aia",
> + "Set KVM AIA mode. Valid values
> are "
> + "emul, hwaccel, and auto. Default "
> + "is auto.");
> + object_property_set_default_str(object_class_property_find(oc,
> "kvm-aia"),
> + "auto");
> +
> +#endif
> object_class_property_add(oc, "acpi", "OnOffAuto",
> virt_get_acpi, virt_set_acpi,
> NULL, NULL);
> diff --git a/include/hw/riscv/virt.h b/include/hw/riscv/virt.h
> index e5c474b26e..d0140feeff 100644
> --- a/include/hw/riscv/virt.h
> +++ b/include/hw/riscv/virt.h
> @@ -56,6 +56,7 @@ struct RISCVVirtState {
> bool have_aclint;
> RISCVVirtAIAType aia_type;
> int aia_guests;
> + uint64_t kvm_aia_mode;
> char *oem_id;
> char *oem_table_id;
> OnOffAuto acpi;
> --
> 2.17.1
>
Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
- [PATCH v5 0/5] Add RISC-V KVM AIA Support, Yong-Xuan Wang, 2023/07/13
- [PATCH v5 1/5] target/riscv: support the AIA device emulation with KVM enabled, Yong-Xuan Wang, 2023/07/13
- [PATCH v5 2/5] target/riscv: check the in-kernel irqchip support, Yong-Xuan Wang, 2023/07/13
- [PATCH v5 3/5] target/riscv: Create an KVM AIA irqchip, Yong-Xuan Wang, 2023/07/13
- [PATCH v5 4/5] target/riscv: update APLIC and IMSIC to support KVM AIA, Yong-Xuan Wang, 2023/07/13
- [PATCH v5 5/5] target/riscv: select KVM AIA in riscv virt machine, Yong-Xuan Wang, 2023/07/13
- Re: [PATCH v5 5/5] target/riscv: select KVM AIA in riscv virt machine,
Andrew Jones <=