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Re: [PATCH v3 11/16] target/riscv: Move sysemu-specific debug files to t
From: |
Alistair Francis |
Subject: |
Re: [PATCH v3 11/16] target/riscv: Move sysemu-specific debug files to target/riscv/sysemu/ |
Date: |
Wed, 19 Jul 2023 11:04:24 +1000 |
On Tue, Jul 11, 2023 at 10:22 PM Philippe Mathieu-Daudé
<philmd@linaro.org> wrote:
>
> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Acked-by: Alistair Francis <alistair.francis@wdc.com>
Alistair
> ---
> target/riscv/cpu.h | 2 +-
> target/riscv/{ => sysemu}/debug.h | 0
> target/riscv/cpu_helper.c | 2 +-
> target/riscv/{ => sysemu}/debug.c | 0
> target/riscv/meson.build | 4 ----
> target/riscv/sysemu/meson.build | 1 +
> 6 files changed, 3 insertions(+), 6 deletions(-)
> rename target/riscv/{ => sysemu}/debug.h (100%)
> rename target/riscv/{ => sysemu}/debug.c (100%)
>
> diff --git a/target/riscv/cpu.h b/target/riscv/cpu.h
> index 0602b948d4..8d8e30d6c1 100644
> --- a/target/riscv/cpu.h
> +++ b/target/riscv/cpu.h
> @@ -94,7 +94,7 @@ typedef enum {
>
> #if !defined(CONFIG_USER_ONLY)
> #include "sysemu/pmp.h"
> -#include "debug.h"
> +#include "sysemu/debug.h"
> #endif
>
> #define RV_VLEN_MAX 1024
> diff --git a/target/riscv/debug.h b/target/riscv/sysemu/debug.h
> similarity index 100%
> rename from target/riscv/debug.h
> rename to target/riscv/sysemu/debug.h
> diff --git a/target/riscv/cpu_helper.c b/target/riscv/cpu_helper.c
> index 6f8778c6d3..6c773000a5 100644
> --- a/target/riscv/cpu_helper.c
> +++ b/target/riscv/cpu_helper.c
> @@ -32,7 +32,7 @@
> #include "sysemu/cpu-timers.h"
> #endif
> #include "cpu_bits.h"
> -#include "debug.h"
> +#include "sysemu/debug.h"
> #include "tcg/oversized-guest.h"
>
> int riscv_cpu_mmu_index(CPURISCVState *env, bool ifetch)
> diff --git a/target/riscv/debug.c b/target/riscv/sysemu/debug.c
> similarity index 100%
> rename from target/riscv/debug.c
> rename to target/riscv/sysemu/debug.c
> diff --git a/target/riscv/meson.build b/target/riscv/meson.build
> index 8ef47f43f9..49cdcde679 100644
> --- a/target/riscv/meson.build
> +++ b/target/riscv/meson.build
> @@ -8,10 +8,6 @@ riscv_ss.add(files(
> 'gdbstub.c',
> ))
>
> -riscv_system_ss.add(files(
> - 'debug.c',
> -))
> -
> subdir('tcg')
> subdir('sysemu')
>
> diff --git a/target/riscv/sysemu/meson.build b/target/riscv/sysemu/meson.build
> index 64de0256a5..e902ba2dad 100644
> --- a/target/riscv/sysemu/meson.build
> +++ b/target/riscv/sysemu/meson.build
> @@ -1,5 +1,6 @@
> riscv_system_ss.add(files(
> 'arch_dump.c',
> + 'debug.c',
> 'machine.c',
> 'monitor.c',
> 'pmp.c',
> --
> 2.38.1
>
>
- Re: [PATCH v3 06/16] target/riscv: Restrict riscv_cpu_do_interrupt() to sysemu, (continued)
- [PATCH v3 08/16] target/riscv: Move TCG-specific cpu_get_tb_cpu_state() to tcg/cpu.c, Philippe Mathieu-Daudé, 2023/07/11
- [PATCH v3 07/16] target/riscv: Move TCG-specific files to target/riscv/tcg/, Philippe Mathieu-Daudé, 2023/07/11
- [PATCH v3 10/16] target/riscv: Extract TCG-specific code from debug.c, Philippe Mathieu-Daudé, 2023/07/11
- [PATCH v3 09/16] target/riscv: Expose some 'trigger' prototypes from debug.c, Philippe Mathieu-Daudé, 2023/07/11
- [PATCH v3 11/16] target/riscv: Move sysemu-specific debug files to target/riscv/sysemu/, Philippe Mathieu-Daudé, 2023/07/11
- Re: [PATCH v3 11/16] target/riscv: Move sysemu-specific debug files to target/riscv/sysemu/,
Alistair Francis <=
- [PATCH v3 12/16] target/riscv: Expose riscv_cpu_pending_to_irq() from cpu_helper.c, Philippe Mathieu-Daudé, 2023/07/11
- [RFC PATCH v3 13/16] target/riscv: Move TCG/sysemu-specific code to tcg/sysemu/cpu_helper.c, Philippe Mathieu-Daudé, 2023/07/11
- [PATCH v3 14/16] target/riscv: Move sysemu-specific code to sysemu/cpu_helper.c, Philippe Mathieu-Daudé, 2023/07/11
- [PATCH v3 15/16] target/riscv: Restrict TCG-specific prototype declarations, Philippe Mathieu-Daudé, 2023/07/11
- [PATCH v3 16/16] gitlab-ci.d/crossbuilds: Add KVM riscv64 cross-build jobs, Philippe Mathieu-Daudé, 2023/07/11