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Re: [PATCH 0/2] target/riscv: add missing riscv,isa strings


From: Daniel Henrique Barboza
Subject: Re: [PATCH 0/2] target/riscv: add missing riscv,isa strings
Date: Mon, 24 Jul 2023 09:12:40 -0300
User-agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.13.0



On 7/23/23 23:51, Alistair Francis wrote:
On Thu, Jul 20, 2023 at 11:25 PM Daniel Henrique Barboza
<dbarboza@ventanamicro.com> wrote:

Hi,

Found these 2 instances while working in more 8.2 material.

I believe both are safe for freeze but I won't lose my sleep if we
decide to postpone it.

I wasn't going to squeeze them into the freeze


Daniel Henrique Barboza (2):
   target/riscv/cpu.c: add zmmul isa string
   target/riscv/cpu.c: add smepmp isa string

Do you mind rebasing :)
https://github.com/alistair23/qemu/tree/riscv-to-apply.next


:)


Thanks!


Daniel





Alistair


  target/riscv/cpu.c | 2 ++
  1 file changed, 2 insertions(+)

--
2.41.0





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