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[PATCH v6 09/12] target/riscv/cpu.c: limit cfg->vext_spec log message
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From: |
Daniel Henrique Barboza |
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Subject: |
[PATCH v6 09/12] target/riscv/cpu.c: limit cfg->vext_spec log message |
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Date: |
Thu, 27 Jul 2023 19:09:24 -0300 |
Inside riscv_cpu_validate_v() we're always throwing a log message if the
user didn't set a vector version via 'vext_spec'.
We're going to include one case with the 'max' CPU where env->vext_ver
will be set in the cpu_init(). But that alone will not stop the "vector
version is not specified" message from appearing. The usefulness of this
log message is debatable for the generic CPUs, but for a 'max' CPU type,
where we are supposed to deliver a CPU model with all features possible,
it's strange to force users to set 'vext_spec' to get rid of this
message.
Change riscv_cpu_validate_v() to not throw this log message if
env->vext_ver is already set.
Signed-off-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
---
target/riscv/cpu.c | 9 ++++-----
1 file changed, 4 insertions(+), 5 deletions(-)
diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c
index 08f61ed051..01b0d228f5 100644
--- a/target/riscv/cpu.c
+++ b/target/riscv/cpu.c
@@ -939,8 +939,6 @@ static void riscv_cpu_disas_set_info(CPUState *s,
disassemble_info *info)
static void riscv_cpu_validate_v(CPURISCVState *env, RISCVCPUConfig *cfg,
Error **errp)
{
- int vext_version = VEXT_VERSION_1_00_0;
-
if (!is_power_of_2(cfg->vlen)) {
error_setg(errp, "Vector extension VLEN must be power of 2");
return;
@@ -963,17 +961,18 @@ static void riscv_cpu_validate_v(CPURISCVState *env,
RISCVCPUConfig *cfg,
}
if (cfg->vext_spec) {
if (!g_strcmp0(cfg->vext_spec, "v1.0")) {
- vext_version = VEXT_VERSION_1_00_0;
+ env->vext_ver = VEXT_VERSION_1_00_0;
} else {
error_setg(errp, "Unsupported vector spec version '%s'",
cfg->vext_spec);
return;
}
- } else {
+ } else if (env->vext_ver == 0) {
qemu_log("vector version is not specified, "
"use the default value v1.0\n");
+
+ env->vext_ver = VEXT_VERSION_1_00_0;
}
- env->vext_ver = vext_version;
}
static void riscv_cpu_validate_priv_spec(RISCVCPU *cpu, Error **errp)
--
2.41.0
- [PATCH v6 00/12] riscv: add 'max' CPU, deprecate 'any', Daniel Henrique Barboza, 2023/07/27
- [PATCH v6 01/12] target/riscv/cpu.c: split CPU options from riscv_cpu_extensions[], Daniel Henrique Barboza, 2023/07/27
- [PATCH v6 02/12] target/riscv/cpu.c: skip 'bool' check when filtering KVM props, Daniel Henrique Barboza, 2023/07/27
- [PATCH v6 03/12] target/riscv/cpu.c: split kvm prop handling to its own helper, Daniel Henrique Barboza, 2023/07/27
- [PATCH v6 04/12] target/riscv/cpu.c: del DEFINE_PROP_END_OF_LIST() from riscv_cpu_extensions, Daniel Henrique Barboza, 2023/07/27
- [PATCH v6 05/12] target/riscv/cpu.c: split vendor exts from riscv_cpu_extensions[], Daniel Henrique Barboza, 2023/07/27
- [PATCH v6 06/12] target/riscv/cpu.c: split non-ratified exts from riscv_cpu_extensions[], Daniel Henrique Barboza, 2023/07/27
- [PATCH v6 07/12] target/riscv/cpu.c: add ADD_CPU_QDEV_PROPERTIES_ARRAY() macro, Daniel Henrique Barboza, 2023/07/27
- [PATCH v6 08/12] target/riscv/cpu.c: add ADD_UNAVAIL_KVM_PROP_ARRAY() macro, Daniel Henrique Barboza, 2023/07/27
- [PATCH v6 09/12] target/riscv/cpu.c: limit cfg->vext_spec log message,
Daniel Henrique Barboza <=
- [PATCH v6 10/12] target/riscv: add 'max' CPU type, Daniel Henrique Barboza, 2023/07/27
- [PATCH v6 11/12] avocado, risc-v: add opensbi tests for 'max' CPU, Daniel Henrique Barboza, 2023/07/27
- [PATCH v6 12/12] target/riscv: deprecate the 'any' CPU type, Daniel Henrique Barboza, 2023/07/27