Re: [PATCH 12/20] target/riscv: move KVM only files to kvm subdir

[Daniel Henrique Barboza]

On 8/31/23 08:30, Andrew Jones wrote:
> On Fri, Aug 25, 2023 at 10:08:45AM -0300, Daniel Henrique Barboza wrote:
> > Move the files to a 'kvm' dir to promote more code separation between
> > accelerators and making our lives easier supporting build options such
> > as --disable-tcg.
> >
> > Rename kvm.c to kvm-cpu.c to keep it in line with its TCG counterpart.
>
> Now that we have 'kvm' and 'tcg' subdirectories, it seems like we should
> be removing prefixes from files, i.e. 'kvm/cpu.c' and 'tcg/cpu.c' would be
> less verbose and just as easy to identify, but whatever people like...

I don't mind shortening the names. I chose these because x86 names it that
way.

It's also easier to identify in the editor which file I'm editing at that
moment via the filename alone, e.g. tcg-cpu.c is easier to identify than
seeing 'cpu.c' and having to check the rest of the path.

Yes, VSCode user here, too old for vim/emacs :D



Thanks,

Daniel


> > Signed-off-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
> > ---
> >   hw/riscv/virt.c                       | 2 +-
> >   target/riscv/cpu.c                    | 2 +-
> >   target/riscv/{kvm.c => kvm/kvm-cpu.c} | 0
> >   target/riscv/{ => kvm}/kvm-stub.c     | 0
> >   target/riscv/{ => kvm}/kvm_riscv.h    | 0
> >   target/riscv/kvm/meson.build          | 2 ++
> >   target/riscv/meson.build              | 2 +-
> >   7 files changed, 5 insertions(+), 3 deletions(-)
> >   rename target/riscv/{kvm.c => kvm/kvm-cpu.c} (100%)
> >   rename target/riscv/{ => kvm}/kvm-stub.c (100%)
> >   rename target/riscv/{ => kvm}/kvm_riscv.h (100%)
> >   create mode 100644 target/riscv/kvm/meson.build
> >
> > diff --git a/hw/riscv/virt.c b/hw/riscv/virt.c
> > index 388e52a294..77c384ddc3 100644
> > --- a/hw/riscv/virt.c
> > +++ b/hw/riscv/virt.c
> > @@ -35,7 +35,7 @@
> >   #include "hw/riscv/virt.h"
> >   #include "hw/riscv/boot.h"
> >   #include "hw/riscv/numa.h"
> > -#include "kvm_riscv.h"
> > +#include "kvm/kvm_riscv.h"
> >   #include "hw/intc/riscv_aclint.h"
> >   #include "hw/intc/riscv_aplic.h"
> >   #include "hw/intc/riscv_imsic.h"
> > diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c
> > index 04c6bfaeef..bf6c8519b1 100644
> > --- a/target/riscv/cpu.c
> > +++ b/target/riscv/cpu.c
> > @@ -33,7 +33,7 @@
> >   #include "fpu/softfloat-helpers.h"
> >   #include "sysemu/kvm.h"
> >   #include "sysemu/tcg.h"
> > -#include "kvm_riscv.h"
> > +#include "kvm/kvm_riscv.h"
> >   #include "tcg/tcg.h"
> >   
> >   /* RISC-V CPU definitions */
> > diff --git a/target/riscv/kvm.c b/target/riscv/kvm/kvm-cpu.c
> > similarity index 100%
> > rename from target/riscv/kvm.c
> > rename to target/riscv/kvm/kvm-cpu.c
> > diff --git a/target/riscv/kvm-stub.c b/target/riscv/kvm/kvm-stub.c
> > similarity index 100%
> > rename from target/riscv/kvm-stub.c
> > rename to target/riscv/kvm/kvm-stub.c
> > diff --git a/target/riscv/kvm_riscv.h b/target/riscv/kvm/kvm_riscv.h
> > similarity index 100%
> > rename from target/riscv/kvm_riscv.h
> > rename to target/riscv/kvm/kvm_riscv.h
> > diff --git a/target/riscv/kvm/meson.build b/target/riscv/kvm/meson.build
> > new file mode 100644
> > index 0000000000..1cd6783894
> > --- /dev/null
> > +++ b/target/riscv/kvm/meson.build
> > @@ -0,0 +1,2 @@
> > +riscv_ss.add(when: 'CONFIG_KVM', if_true: files('kvm-cpu.c'),
> > +                                 if_false: files('kvm-stub.c'))
> > diff --git a/target/riscv/meson.build b/target/riscv/meson.build
> > index f0486183fa..c53962215f 100644
> > --- a/target/riscv/meson.build
> > +++ b/target/riscv/meson.build
> > @@ -24,7 +24,6 @@ riscv_ss.add(files(
> >     'zce_helper.c',
> >     'vcrypto_helper.c'
> >   ))
> > -riscv_ss.add(when: 'CONFIG_KVM', if_true: files('kvm.c'), if_false: 
> > files('kvm-stub.c'))
> >   
> >   riscv_system_ss = ss.source_set()
> >   riscv_system_ss.add(files(
> > @@ -39,6 +38,7 @@ riscv_system_ss.add(files(
> >   ))
> >   
> >   subdir('tcg')
> > +subdir('kvm')
> >   
> >   target_arch += {'riscv': riscv_ss}
> >   target_softmmu_arch += {'riscv': riscv_system_ss}
> > --
> > 2.41.0
>
> Reviewed-by: Andrew Jones <ajones@ventanamicro.com>