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Re: [PATCH v2 11/19] target/riscv: introduce KVM AccelCPUClass
From: |
Andrew Jones |
Subject: |
Re: [PATCH v2 11/19] target/riscv: introduce KVM AccelCPUClass |
Date: |
Mon, 11 Sep 2023 09:52:58 +0200 |
On Wed, Sep 06, 2023 at 06:16:38AM -0300, Daniel Henrique Barboza wrote:
> Add a KVM accelerator class like we did with TCG. The difference is
> that, at least for now, we won't be using a realize() implementation for
> this accelerator.
>
> We'll start by assiging kvm_riscv_cpu_add_kvm_properties(), renamed to
> kvm_cpu_instance_init(), as a 'cpu_instance_init' implementation. Change
> riscv_cpu_post_init() to invoke accel_cpu_instance_init(), which will go
> through the 'cpu_instance_init' impl of the current acceleration (if
> available) and execute it. The end result is that the KVM initial setup,
> i.e. starting registers and adding its specific properties, will be done
> via this hook.
>
> Add a 'tcg_enabled()' condition in riscv_cpu_post_init() to avoid
> calling riscv_cpu_add_user_properties() when running KVM. We'll remove
> this condition when the TCG accel class get its own 'cpu_instance_init'
> implementation.
>
> Signed-off-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
> ---
> target/riscv/cpu.c | 8 +++-----
> target/riscv/kvm.c | 26 ++++++++++++++++++++++++--
> target/riscv/kvm_riscv.h | 6 ------
> 3 files changed, 27 insertions(+), 13 deletions(-)
>
> diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c
> index 50be127f36..c8a19be1af 100644
> --- a/target/riscv/cpu.c
> +++ b/target/riscv/cpu.c
> @@ -1219,7 +1219,9 @@ static bool riscv_cpu_has_user_properties(Object
> *cpu_obj)
>
> static void riscv_cpu_post_init(Object *obj)
> {
> - if (riscv_cpu_has_user_properties(obj)) {
> + accel_cpu_instance_init(CPU(obj));
> +
> + if (tcg_enabled() && riscv_cpu_has_user_properties(obj)) {
> riscv_cpu_add_user_properties(obj);
> }
>
> @@ -1589,10 +1591,6 @@ static void riscv_cpu_add_multiext_prop_array(Object
> *obj,
> static void riscv_cpu_add_user_properties(Object *obj)
> {
> #ifndef CONFIG_USER_ONLY
> - if (kvm_enabled()) {
> - kvm_riscv_cpu_add_kvm_properties(obj);
> - return;
> - }
> riscv_add_satp_mode_properties(obj);
> #endif
>
> diff --git a/target/riscv/kvm.c b/target/riscv/kvm.c
> index ef6b2cfffe..492b97d19b 100644
> --- a/target/riscv/kvm.c
> +++ b/target/riscv/kvm.c
> @@ -31,6 +31,7 @@
> #include "sysemu/kvm_int.h"
> #include "cpu.h"
> #include "trace.h"
> +#include "hw/core/accel-cpu.h"
> #include "hw/pci/pci.h"
> #include "exec/memattrs.h"
> #include "exec/address-spaces.h"
> @@ -1274,8 +1275,9 @@ void kvm_riscv_aia_create(MachineState *machine,
> uint64_t group_shift,
> kvm_msi_via_irqfd_allowed = kvm_irqfds_enabled();
> }
>
> -void kvm_riscv_cpu_add_kvm_properties(Object *obj)
> +static void kvm_cpu_instance_init(CPUState *cs)
> {
> + Object *obj = OBJECT(RISCV_CPU(cs));
> DeviceState *dev = DEVICE(obj);
>
> riscv_init_user_properties(obj);
> @@ -1287,7 +1289,7 @@ void kvm_riscv_cpu_add_kvm_properties(Object *obj)
> riscv_cpu_add_kvm_unavail_prop_array(obj, riscv_cpu_experimental_exts);
>
> for (Property *prop = riscv_cpu_options; prop && prop->name; prop++) {
> - /* Check if KVM created the property already */
> + /* Check if we have a specific KVM handler for the option */
> if (object_property_find(obj, prop->name)) {
> continue;
> }
> @@ -1295,6 +1297,26 @@ void kvm_riscv_cpu_add_kvm_properties(Object *obj)
> }
> }
>
> +static void kvm_cpu_accel_class_init(ObjectClass *oc, void *data)
> +{
> + AccelCPUClass *acc = ACCEL_CPU_CLASS(oc);
> +
> + acc->cpu_instance_init = kvm_cpu_instance_init;
> +}
> +
> +static const TypeInfo kvm_cpu_accel_type_info = {
> + .name = ACCEL_CPU_NAME("kvm"),
> +
> + .parent = TYPE_ACCEL_CPU,
> + .class_init = kvm_cpu_accel_class_init,
> + .abstract = true,
> +};
> +static void kvm_cpu_accel_register_types(void)
> +{
> + type_register_static(&kvm_cpu_accel_type_info);
> +}
> +type_init(kvm_cpu_accel_register_types);
> +
> static void riscv_host_cpu_init(Object *obj)
> {
> CPURISCVState *env = &RISCV_CPU(obj)->env;
> diff --git a/target/riscv/kvm_riscv.h b/target/riscv/kvm_riscv.h
> index c9ecd9a967..8fe6e3e6fb 100644
> --- a/target/riscv/kvm_riscv.h
> +++ b/target/riscv/kvm_riscv.h
> @@ -20,7 +20,6 @@
> #define QEMU_KVM_RISCV_H
>
> #ifdef CONFIG_KVM
> -void kvm_riscv_cpu_add_kvm_properties(Object *obj);
> void kvm_riscv_reset_vcpu(RISCVCPU *cpu);
> void kvm_riscv_set_irq(RISCVCPU *cpu, int irq, int level);
> void kvm_riscv_aia_create(MachineState *machine, uint64_t group_shift,
> @@ -29,11 +28,6 @@ void kvm_riscv_aia_create(MachineState *machine, uint64_t
> group_shift,
> uint64_t guest_num);
> void riscv_kvm_aplic_request(void *opaque, int irq, int level);
> #else
> -static inline void kvm_riscv_cpu_add_kvm_properties(Object *obj)
> -{
> - g_assert_not_reached();
> -}
> -
> static inline void kvm_riscv_reset_vcpu(RISCVCPU *cpu)
> {
> g_assert_not_reached();
> --
> 2.41.0
>
Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
- [PATCH v2 06/19] target/riscv: move 'host' CPU declaration to kvm.c, (continued)
- [PATCH v2 06/19] target/riscv: move 'host' CPU declaration to kvm.c, Daniel Henrique Barboza, 2023/09/06
- [PATCH v2 07/19] target/riscv/cpu.c: mark extensions arrays as 'const', Daniel Henrique Barboza, 2023/09/06
- [PATCH v2 08/19] target/riscv: move riscv_cpu_add_kvm_properties() to kvm.c, Daniel Henrique Barboza, 2023/09/06
- [PATCH v2 09/19] target/riscv: make riscv_add_satp_mode_properties() public, Daniel Henrique Barboza, 2023/09/06
- [PATCH v2 11/19] target/riscv: introduce KVM AccelCPUClass, Daniel Henrique Barboza, 2023/09/06
- [PATCH v2 12/19] target/riscv: move KVM only files to kvm subdir, Daniel Henrique Barboza, 2023/09/06
- [PATCH v2 13/19] target/riscv/kvm: do not use riscv_cpu_add_misa_properties(), Daniel Henrique Barboza, 2023/09/06
- [PATCH v2 14/19] target/riscv/cpu.c: export set_misa(), Daniel Henrique Barboza, 2023/09/06
- [PATCH v2 18/19] target/riscv/cpu.c: export isa_edata_arr[], Daniel Henrique Barboza, 2023/09/06
- [PATCH v2 10/19] target/riscv: remove kvm-stub.c, Daniel Henrique Barboza, 2023/09/06