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[PATCH v10 00/20] riscv: 'max' CPU, detect user choice in TCG


From: Daniel Henrique Barboza
Subject: [PATCH v10 00/20] riscv: 'max' CPU, detect user choice in TCG
Date: Tue, 12 Sep 2023 10:24:03 -0300

Hi,

In this version we have a change in patch 3. It was causing a build
break with --enable-debug builds that weren't being detected by regular
gitlab CI but was detected when running the merge CI [1]. The problem is
reproducible by any risc-v --enable-debug build.

I ended up leaving kvm_riscv_cpu_add_kvm_properties implementation
inside cpu.c, since it can't be easily moved to kvm.c at this point,
while adding its function declaration in kvm_riscv.h since it's a KVM
only function. This is temporary, not a pattern we want to promote.
We'll move the function to kvm.c when splitting accelerators logic in
"riscv: split TCG/KVM accelerators from cpu.c", patch 08 in the current
version of that series [2].

Series rebased on top of master. Only patch 3 is missing acks.

Changes from v9:
- patch 3:
  - use #ifdef CONFIG_KVM instead of #ifndef CONFIG_USER_ONLY
  - helper renamed to kvm_riscv_cpu_add_kvm_properties
  - helper is declared in kvm_riscv.h 
- v9 link: 
20230901194627.1214811-1-dbarboza@ventanamicro.com/">https://lore.kernel.org/qemu-riscv/20230901194627.1214811-1-dbarboza@ventanamicro.com/

[1] https://lists.gnu.org/archive/html/qemu-devel/2023-09/msg01729.html
[2] 
20230906091647.1667171-9-dbarboza@ventanamicro.com/">https://lore.kernel.org/qemu-riscv/20230906091647.1667171-9-dbarboza@ventanamicro.com/

Daniel Henrique Barboza (20):
  target/riscv/cpu.c: split CPU options from riscv_cpu_extensions[]
  target/riscv/cpu.c: skip 'bool' check when filtering KVM props
  target/riscv/cpu.c: split kvm prop handling to its own helper
  target/riscv: add DEFINE_PROP_END_OF_LIST() to riscv_cpu_options[]
  target/riscv/cpu.c: split non-ratified exts from
    riscv_cpu_extensions[]
  target/riscv/cpu.c: split vendor exts from riscv_cpu_extensions[]
  target/riscv/cpu.c: add riscv_cpu_add_qdev_prop_array()
  target/riscv/cpu.c: add riscv_cpu_add_kvm_unavail_prop_array()
  target/riscv/cpu.c: limit cfg->vext_spec log message
  target/riscv: add 'max' CPU type
  avocado, risc-v: add tuxboot tests for 'max' CPU
  target/riscv: deprecate the 'any' CPU type
  target/riscv/cpu.c: use offset in isa_ext_is_enabled/update_enabled
  target/riscv: make CPUCFG() macro public
  target/riscv/cpu.c: introduce cpu_cfg_ext_auto_update()
  target/riscv/cpu.c: use cpu_cfg_ext_auto_update() during realize()
  target/riscv/cpu.c: introduce RISCVCPUMultiExtConfig
  target/riscv: use isa_ext_update_enabled() in
    init_max_cpu_extensions()
  target/riscv/cpu.c: honor user choice in cpu_cfg_ext_auto_update()
  target/riscv/cpu.c: consider user option with RVG

 docs/about/deprecated.rst         |  12 +
 target/riscv/cpu-qom.h            |   1 +
 target/riscv/cpu.c                | 564 +++++++++++++++++++++---------
 target/riscv/cpu.h                |   2 +
 target/riscv/kvm.c                |   8 +-
 target/riscv/kvm_riscv.h          |   3 +
 tests/avocado/tuxrun_baselines.py |  32 ++
 7 files changed, 452 insertions(+), 170 deletions(-)

-- 
2.41.0




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