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Re: [PATCH v3 6/6] target/riscv: Use MAKE_64BIT_MASK instead of custom m
From: |
Alistair Francis |
Subject: |
Re: [PATCH v3 6/6] target/riscv: Use MAKE_64BIT_MASK instead of custom macro |
Date: |
Mon, 16 Oct 2023 14:29:58 +1000 |
On Fri, Oct 13, 2023 at 9:04 PM Rob Bradford <rbradford@rivosinc.com> wrote:
>
> A 32-bit mask can be trivially created using the 64-bit macro so make
> use of that instead.
>
> Signed-off-by: Rob Bradford <rbradford@rivosinc.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Alistair
> ---
> target/riscv/pmu.c | 4 +---
> 1 file changed, 1 insertion(+), 3 deletions(-)
>
> diff --git a/target/riscv/pmu.c b/target/riscv/pmu.c
> index 9253e5f17a..052d5b1164 100644
> --- a/target/riscv/pmu.c
> +++ b/target/riscv/pmu.c
> @@ -25,8 +25,6 @@
> #include "sysemu/device_tree.h"
>
> #define RISCV_TIMEBASE_FREQ 1000000000 /* 1Ghz */
> -#define MAKE_32BIT_MASK(shift, length) \
> - (((uint32_t)(~0UL) >> (32 - (length))) << (shift))
>
> /*
> * To keep it simple, any event can be mapped to any programmable counters in
> @@ -455,7 +453,7 @@ void riscv_pmu_init(RISCVCPU *cpu, Error **errp)
> /* Check if user set it by comparing against default */
> if (pmu_num != 16) {
> warn_report("\"pmu-num\" property is deprecated; use \"pmu-mask\"");
> - cpu->cfg.pmu_mask = MAKE_32BIT_MASK(3, pmu_num);
> + cpu->cfg.pmu_mask = MAKE_64BIT_MASK(3, pmu_num);
> }
>
> cpu->pmu_avail_ctrs = cpu->cfg.pmu_mask;
> --
> 2.41.0
>
>
- [PATCH v3 0/6] Support discontinuous PMU counters, Rob Bradford, 2023/10/13
- [PATCH v3 1/6] target/riscv: Propagate error from PMU setup, Rob Bradford, 2023/10/13
- [PATCH v3 5/6] docs/about/deprecated: Document RISC-V "pmu-num" deprecation, Rob Bradford, 2023/10/13
- [PATCH v3 4/6] target/riscv: Add "pmu-mask" property to replace "pmu-num", Rob Bradford, 2023/10/13
- [PATCH v3 6/6] target/riscv: Use MAKE_64BIT_MASK instead of custom macro, Rob Bradford, 2023/10/13
- Re: [PATCH v3 6/6] target/riscv: Use MAKE_64BIT_MASK instead of custom macro,
Alistair Francis <=
- [PATCH v3 2/6] target/riscv: Don't assume PMU counters are continuous, Rob Bradford, 2023/10/13
- [PATCH v3 3/6] target/riscv: Use existing PMU counter mask in FDT generation, Rob Bradford, 2023/10/13