Re: [PATCH v2 5/6] target/riscv: add riscv_cpu_accelerator_compatible()

[Alistair Francis]

On Wed, Sep 27, 2023 at 4:42 AM Daniel Henrique Barboza
<dbarboza@ventanamicro.com> wrote:
>
> Add an API to check if a given CPU is compatible with the current
> accelerator.
>
> This will allow query-cpu-model-expansion to work properly in conditions
> where QEMU supports both accelerators (TCG and KVM), QEMU is then
> launched using TCG, and the API requests information about a KVM only
> CPU (e.g. 'host' CPU).
>
> KVM doesn't have such restrictions and, at least in theory, all CPUs
> models should work with KVM. We will revisit this API in case we decide
> to restrict the amount of KVM CPUs we support.
>
> Signed-off-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>

Reviewed-by: Alistair Francis <alistair.francis@wdc.com>

Alistair

> ---
>  target/riscv/cpu.c         | 9 +++++++++
>  target/riscv/cpu.h         | 1 +
>  target/riscv/tcg/tcg-cpu.c | 7 ++++++-
>  target/riscv/tcg/tcg-cpu.h | 1 +
>  4 files changed, 17 insertions(+), 1 deletion(-)
>
> diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c
> index 272baaf6c7..8bdf6dbd5d 100644
> --- a/target/riscv/cpu.c
> +++ b/target/riscv/cpu.c
> @@ -1061,6 +1061,15 @@ static void riscv_cpu_realize(DeviceState *dev, Error 
> **errp)
>      mcc->parent_realize(dev, errp);
>  }
>
> +bool riscv_cpu_accelerator_compatible(RISCVCPU *cpu)
> +{
> +    if (tcg_enabled()) {
> +        return riscv_cpu_tcg_compatible(cpu);
> +    }
> +
> +    return true;
> +}
> +
>  #ifndef CONFIG_USER_ONLY
>  static void cpu_riscv_get_satp(Object *obj, Visitor *v, const char *name,
>                                 void *opaque, Error **errp)
> diff --git a/target/riscv/cpu.h b/target/riscv/cpu.h
> index 1bfa3da55b..00b0507b17 100644
> --- a/target/riscv/cpu.h
> +++ b/target/riscv/cpu.h
> @@ -734,6 +734,7 @@ char *riscv_cpu_get_name(RISCVCPU *cpu);
>
>  void riscv_cpu_finalize_features(RISCVCPU *cpu, Error **errp);
>  void riscv_add_satp_mode_properties(Object *obj);
> +bool riscv_cpu_accelerator_compatible(RISCVCPU *cpu);
>
>  /* CSR function table */
>  extern riscv_csr_operations csr_ops[CSR_TABLE_SIZE];
> diff --git a/target/riscv/tcg/tcg-cpu.c b/target/riscv/tcg/tcg-cpu.c
> index 52cd87db0c..071a744a43 100644
> --- a/target/riscv/tcg/tcg-cpu.c
> +++ b/target/riscv/tcg/tcg-cpu.c
> @@ -582,6 +582,11 @@ void riscv_tcg_cpu_finalize_features(RISCVCPU *cpu, 
> Error **errp)
>      }
>  }
>
> +bool riscv_cpu_tcg_compatible(RISCVCPU *cpu)
> +{
> +    return object_dynamic_cast(OBJECT(cpu), TYPE_RISCV_CPU_HOST) == NULL;
> +}
> +
>  static bool riscv_cpu_is_generic(Object *cpu_obj)
>  {
>      return object_dynamic_cast(cpu_obj, TYPE_RISCV_DYNAMIC_CPU) != NULL;
> @@ -599,7 +604,7 @@ static bool tcg_cpu_realizefn(CPUState *cs, Error **errp)
>      RISCVCPU *cpu = RISCV_CPU(cs);
>      Error *local_err = NULL;
>
> -    if (object_dynamic_cast(OBJECT(cpu), TYPE_RISCV_CPU_HOST)) {
> +    if (!riscv_cpu_tcg_compatible(cpu)) {
>          g_autofree char *name = riscv_cpu_get_name(cpu);
>          error_setg(errp, "'%s' CPU is not compatible with TCG acceleration",
>                     name);
> diff --git a/target/riscv/tcg/tcg-cpu.h b/target/riscv/tcg/tcg-cpu.h
> index aa00fbc253..f7b32417f8 100644
> --- a/target/riscv/tcg/tcg-cpu.h
> +++ b/target/riscv/tcg/tcg-cpu.h
> @@ -24,5 +24,6 @@
>
>  void riscv_cpu_validate_set_extensions(RISCVCPU *cpu, Error **errp);
>  void riscv_tcg_cpu_finalize_features(RISCVCPU *cpu, Error **errp);
> +bool riscv_cpu_tcg_compatible(RISCVCPU *cpu);
>
>  #endif
> --
> 2.41.0
>
>