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From: | LIU Zhiwei |
Subject: | Re: [PATCH v2 1/3] target/riscv: Do not allow MXL_RV32 for TARGET_RISCV64 |
Date: | Tue, 17 Oct 2023 10:13:51 +0800 |
User-agent: | Mozilla Thunderbird |
On 2023/10/16 9:51, Alistair Francis wrote:
On Sun, Oct 15, 2023 at 4:05 AM Daniel Henrique Barboza <dbarboza@ventanamicro.com> wrote:On 10/14/23 00:35, Akihiko Odaki wrote:TARGET_RISCV64 does not have riscv-32bit-cpu.xml so it shouldn't accept MXL_RV32. Signed-off-by: Akihiko Odaki <akihiko.odaki@daynix.com> ---Reviewed-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>target/riscv/tcg/tcg-cpu.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/target/riscv/tcg/tcg-cpu.c b/target/riscv/tcg/tcg-cpu.c index a28918ab30..e0cbc56320 100644 --- a/target/riscv/tcg/tcg-cpu.c +++ b/target/riscv/tcg/tcg-cpu.c @@ -161,10 +161,11 @@ static void riscv_cpu_validate_misa_mxl(RISCVCPU *cpu, Error **errp) case MXL_RV128: cc->gdb_core_xml_file = "riscv-64bit-cpu.xml"; break; -#endif +#elif defined(TARGET_RISCV32) case MXL_RV32: cc->gdb_core_xml_file = "riscv-32bit-cpu.xml"; break; +#endifThis isn't the right fix. The idea is that riscv64-softmmu can run 32-bit CPUs, so we instead should include riscv-32bit-cpu.xml
Agree. I'd like to go on the work. The question is that we don't have 64-bit OpenSBI which supports booting 32-bit Linux. So even we have implemented the SXLEN 32bit, we may not have the software to test it.
Do you support the SXL upstreaming with no testing? Thanks, Zhiwei
Alistairdefault: g_assert_not_reached(); }
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