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[PATCH v2 2/6] target/riscv/tcg: add ext_zicntr disable support
From: |
Daniel Henrique Barboza |
Subject: |
[PATCH v2 2/6] target/riscv/tcg: add ext_zicntr disable support |
Date: |
Tue, 17 Oct 2023 19:12:22 -0300 |
Support for the zicntr counters are already in place. We need a way to
disable them if the user wants to. This is done by restricting access to
the CYCLE, TIME, and INSTRET counters via the 'ctr()' predicate when
we're about to access them.
Disabling zicntr happens via the command line or if its dependency,
zicsr, happens to be disabled. We'll check for zicsr during realize() and,
in case it's absent, disable zicntr. However, if the user was explicit
about having zicntr support, error out instead of disabling it.
Signed-off-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
---
target/riscv/csr.c | 4 ++++
target/riscv/tcg/tcg-cpu.c | 8 ++++++++
2 files changed, 12 insertions(+)
diff --git a/target/riscv/csr.c b/target/riscv/csr.c
index a5be1c202c..05c6a69123 100644
--- a/target/riscv/csr.c
+++ b/target/riscv/csr.c
@@ -122,6 +122,10 @@ static RISCVException ctr(CPURISCVState *env, int csrno)
if ((csrno >= CSR_CYCLE && csrno <= CSR_INSTRET) ||
(csrno >= CSR_CYCLEH && csrno <= CSR_INSTRETH)) {
+ if (!riscv_cpu_cfg(env)->ext_zicntr) {
+ return RISCV_EXCP_ILLEGAL_INST;
+ }
+
goto skip_ext_pmu_check;
}
diff --git a/target/riscv/tcg/tcg-cpu.c b/target/riscv/tcg/tcg-cpu.c
index bbce254ee1..a01b876621 100644
--- a/target/riscv/tcg/tcg-cpu.c
+++ b/target/riscv/tcg/tcg-cpu.c
@@ -541,6 +541,14 @@ void riscv_cpu_validate_set_extensions(RISCVCPU *cpu,
Error **errp)
cpu_cfg_ext_auto_update(cpu, CPU_CFG_OFFSET(ext_zksh), true);
}
+ if (cpu->cfg.ext_zicntr && !cpu->cfg.ext_zicsr) {
+ if (cpu_cfg_ext_is_user_set(CPU_CFG_OFFSET(ext_zicntr))) {
+ error_setg(errp, "zicntr requires zicsr");
+ return;
+ }
+ cpu->cfg.ext_zicntr = false;
+ }
+
/*
* Disable isa extensions based on priv spec after we
* validated and set everything we need.
--
2.41.0
- [PATCH v2 0/6] riscv: zicntr/zihpm flags and disable support, Daniel Henrique Barboza, 2023/10/17
- [PATCH v2 2/6] target/riscv/tcg: add ext_zicntr disable support,
Daniel Henrique Barboza <=
- [PATCH v2 1/6] target/riscv/cpu.c: add zicntr extension flag, Daniel Henrique Barboza, 2023/10/17
- [PATCH v2 4/6] target/riscv/cpu.c: add zihpm extension flag, Daniel Henrique Barboza, 2023/10/17
- [PATCH v2 5/6] target/riscv/tcg: add ext_zihpm disable support, Daniel Henrique Barboza, 2023/10/17
- [PATCH v2 3/6] target/riscv/kvm: add zicntr reg, Daniel Henrique Barboza, 2023/10/17
- [PATCH v2 6/6] target/riscv/kvm: add zihpm reg, Daniel Henrique Barboza, 2023/10/17