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[PATCH v3 12/12] hw/riscv/virt-acpi-build.c: Add PLIC in MADT
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From: |
Sunil V L |
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Subject: |
[PATCH v3 12/12] hw/riscv/virt-acpi-build.c: Add PLIC in MADT |
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Date: |
Thu, 19 Oct 2023 18:56:48 +0530 |
Add PLIC structures for each socket in the MADT when system is configured
with PLIC as the external interrupt controller.
Signed-off-by: Haibo Xu <haibo1.xu@intel.com>
Signed-off-by: Sunil V L <sunilvl@ventanamicro.com>
---
hw/riscv/virt-acpi-build.c | 29 +++++++++++++++++++++++++++++
1 file changed, 29 insertions(+)
diff --git a/hw/riscv/virt-acpi-build.c b/hw/riscv/virt-acpi-build.c
index 2f1cc92f75..d1761ddddf 100644
--- a/hw/riscv/virt-acpi-build.c
+++ b/hw/riscv/virt-acpi-build.c
@@ -85,6 +85,12 @@ static void riscv_acpi_madt_add_rintc(uint32_t uid,
arch_ids->cpus[uid].props.node_id,
local_cpu_id),
4);
+ } else if (aia_type == VIRT_AIA_TYPE_NONE) {
+ build_append_int_noprefix(entry,
+ ACPI_BUILD_INTC_ID(
+ arch_ids->cpus[uid].props.node_id,
+ 2 * local_cpu_id + 1),
+ 4);
} else {
build_append_int_noprefix(entry, 0, 4);
}
@@ -513,6 +519,29 @@ static void build_madt(GArray *table_data,
build_append_int_noprefix(table_data,
s->memmap[VIRT_APLIC_S].size, 4);
}
+ } else {
+ /* PLICs */
+ for (socket = 0; socket < riscv_socket_count(ms); socket++) {
+ aplic_addr = s->memmap[VIRT_PLIC].base +
+ s->memmap[VIRT_PLIC].size * socket;
+ gsi_base = VIRT_IRQCHIP_NUM_SOURCES * socket;
+ build_append_int_noprefix(table_data, 0x1B, 1); /* Type */
+ build_append_int_noprefix(table_data, 36, 1); /* Length */
+ build_append_int_noprefix(table_data, 1, 1); /* Version */
+ build_append_int_noprefix(table_data, socket, 1); /* PLIC ID */
+ build_append_int_noprefix(table_data, 0, 8); /* Hardware ID */
+ /* Total External Interrupt Sources Supported */
+ build_append_int_noprefix(table_data,
+ VIRT_IRQCHIP_NUM_SOURCES - 1, 2);
+ build_append_int_noprefix(table_data, 0, 2); /* Max priority */
+ build_append_int_noprefix(table_data, 0, 4); /* Flags */
+ /* PLIC Size */
+ build_append_int_noprefix(table_data, s->memmap[VIRT_PLIC].size,
4);
+ /* PLIC Address */
+ build_append_int_noprefix(table_data, aplic_addr, 8);
+ /* Global System Interrupt Vector Base */
+ build_append_int_noprefix(table_data, gsi_base, 4);
+ }
}
acpi_table_end(linker, &table);
--
2.34.1
- [PATCH v3 07/12] hw/riscv/virt-acpi-build.c: Add CMO information in RHCT, (continued)
- [PATCH v3 07/12] hw/riscv/virt-acpi-build.c: Add CMO information in RHCT, Sunil V L, 2023/10/19
- [PATCH v3 08/12] hw/riscv/virt-acpi-build.c: Add MMU node in RHCT, Sunil V L, 2023/10/19
- [PATCH v3 09/12] hw/pci-host/gpex: Define properties for MMIO ranges, Sunil V L, 2023/10/19
- [PATCH v3 10/12] hw/riscv/virt: Update GPEX MMIO related properties, Sunil V L, 2023/10/19
- [PATCH v3 11/12] hw/riscv/virt-acpi-build.c: Add IO controllers and devices, Sunil V L, 2023/10/19
- [PATCH v3 12/12] hw/riscv/virt-acpi-build.c: Add PLIC in MADT,
Sunil V L <=