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[PATCH v5 07/10] target/riscv/tcg: handle profile MISA bits
From: |
Daniel Henrique Barboza |
Subject: |
[PATCH v5 07/10] target/riscv/tcg: handle profile MISA bits |
Date: |
Wed, 25 Oct 2023 20:44:56 -0300 |
The profile support is handling multi-letter extensions only. Let's add
support for MISA bits as well.
We'll go through every known MISA bit. If the profile doesn't declare the bit
as mandatory, ignore it. Otherwise, set or clear the bit in env->misa_ext and
env->misa_ext_mask depending on whether the profile was set to 'true' or
'false'.
Signed-off-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
Reviewed-by: LIU Zhiwei <zhiwei_liu@linux.alibaba.com>
Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
---
target/riscv/tcg/tcg-cpu.c | 13 +++++++++++++
1 file changed, 13 insertions(+)
diff --git a/target/riscv/tcg/tcg-cpu.c b/target/riscv/tcg/tcg-cpu.c
index 5d96ccb45c..4f4bc58627 100644
--- a/target/riscv/tcg/tcg-cpu.c
+++ b/target/riscv/tcg/tcg-cpu.c
@@ -829,6 +829,19 @@ static void cpu_set_profile(Object *obj, Visitor *v, const
char *name,
profile->user_set = true;
profile->enabled = value;
+ for (i = 0; misa_bits[i] != 0; i++) {
+ uint32_t bit = misa_bits[i];
+
+ if (!(profile->misa_ext & bit)) {
+ continue;
+ }
+
+ g_hash_table_insert(misa_ext_user_opts,
+ GUINT_TO_POINTER(bit),
+ (gpointer)value);
+ riscv_cpu_write_misa_bit(cpu, bit, profile->enabled);
+ }
+
for (i = 0; profile->ext_offsets[i] != RISCV_PROFILE_EXT_LIST_END; i++) {
ext_offset = profile->ext_offsets[i];
--
2.41.0
- [PATCH v5 02/10] target/riscv: add rva22u64 profile definition, (continued)
- [PATCH v5 02/10] target/riscv: add rva22u64 profile definition, Daniel Henrique Barboza, 2023/10/25
- [PATCH v5 04/10] target/riscv/tcg: add user flag for profile support, Daniel Henrique Barboza, 2023/10/25
- [PATCH v5 06/10] target/riscv/tcg: add riscv_cpu_write_misa_bit(), Daniel Henrique Barboza, 2023/10/25
- [PATCH v5 05/10] target/riscv/tcg: add MISA user options hash, Daniel Henrique Barboza, 2023/10/25
- [PATCH v5 01/10] target/riscv/tcg: add 'zic64b' support, Daniel Henrique Barboza, 2023/10/25
- [PATCH v5 08/10] target/riscv/tcg: add hash table insert helpers, Daniel Henrique Barboza, 2023/10/25
- [PATCH v5 07/10] target/riscv/tcg: handle profile MISA bits,
Daniel Henrique Barboza <=
- [PATCH v5 10/10] target/riscv/tcg: warn if profile exts are disabled, Daniel Henrique Barboza, 2023/10/25
- [PATCH v5 09/10] target/riscv/tcg: honor user choice for G MISA bits, Daniel Henrique Barboza, 2023/10/25