Re: [PATCH v4 1/9] target/riscv: add rva22u64 profile definition

[Richard Henderson]

On 10/25/23 16:48, Richard Henderson wrote:
> On 10/25/23 06:49, Daniel Henrique Barboza wrote:
> > +/* Optional extensions left out: RVV, zfh, zkn, zks */
> > +static RISCVCPUProfile RVA22U64 = {
>
> const.
>
> > +    .name = "rva22u64",
> > +    .misa_ext = RVI | RVM | RVA | RVF | RVD | RVC,
> > +    .ext_offsets = {
> > +        CPU_CFG_OFFSET(ext_zicsr), CPU_CFG_OFFSET(ext_zihintpause),
> > +        CPU_CFG_OFFSET(ext_zba), CPU_CFG_OFFSET(ext_zbb),
> > +        CPU_CFG_OFFSET(ext_zbs), CPU_CFG_OFFSET(ext_zfhmin),
> > +        CPU_CFG_OFFSET(ext_zkt), CPU_CFG_OFFSET(ext_zicntr),
> > +        CPU_CFG_OFFSET(ext_zihpm), CPU_CFG_OFFSET(ext_zicbom),
> > +        CPU_CFG_OFFSET(ext_zicboz),
> > +
> > +        RISCV_PROFILE_EXT_LIST_END
> > +    }
> > +};
> > +
> > +RISCVCPUProfile *riscv_profiles[] = {
> > +    &RVA22U64, NULL,
> > +};
>
> const RISCVCPUProfile * const riscv_profiles[]

Ho hum, nevermind.  I see they actually have writable elements.


r~