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[PATCH for-9.0 v2 0/8] target/riscv: implement RVA22S64 profile
From: |
Daniel Henrique Barboza |
Subject: |
[PATCH for-9.0 v2 0/8] target/riscv: implement RVA22S64 profile |
Date: |
Mon, 27 Nov 2023 08:37:44 -0300 |
Based-on: 20231124202353.1187814-1-dbarboza@ventanamicro.com
("[PATCH for-9.0 v12 00/18] riscv: rv64i/rva22u64 CPUs, RVA22U64 profile
support")
Hi,
In this second version the most notable change is a new patch where we
added a 'parent' field in the profile description. This feature was
suggested by Drew in the v1 review.
RVA22S64 is then declared as having RVA22U64 as parent, plus any other
extensions, named features and other contraints that are specific to
RVA22S64.
Another notable change is the removal of riscv_cpu_validate_svade(). The
helper (a single assignment) is now open-coded in
riscv_cpu_update_named_features().
Series based on top of:
"[PATCH for-9.0 v12 00/18] riscv: rv64i/rva22u64 CPUs, RVA22U64 profile support"
Patches missing acks: 2, 6, 7
Changes from v1:
- patch 1:
- removed riscv_cpu_validate_svade()
- patch 2:
- add RISCV_PROFILE_ATTR_UNUSED check when validating priv_spec
- patch 5:
- removed stray blank line
- patch 6 (new):
- add 'parent' in profile description
- patch 7:
- declare RVA22U64 as parent of RVA22S64
- v1 link:
20231123191532.1101644-1-dbarboza@ventanamicro.com/">https://lore.kernel.org/qemu-riscv/20231123191532.1101644-1-dbarboza@ventanamicro.com/
Daniel Henrique Barboza (8):
target/riscv: implement svade
target/riscv: add priv ver restriction to profiles
target/riscv/cpu.c: finalize satp_mode earlier
target/riscv/cpu.c: add riscv_cpu_is_32bit()
target/riscv: add satp_mode profile support
target/riscv: add 'parent' in profile description
target/riscv: add RVA22S64 profile
target/riscv: add rva22s64 cpu
target/riscv/cpu-qom.h | 1 +
target/riscv/cpu.c | 67 ++++++++++++++++++++++++----
target/riscv/cpu.h | 5 +++
target/riscv/cpu_cfg.h | 1 +
target/riscv/tcg/tcg-cpu.c | 90 +++++++++++++++++++++++++++++++++++++-
5 files changed, 154 insertions(+), 10 deletions(-)
--
2.41.0
- [PATCH for-9.0 v2 0/8] target/riscv: implement RVA22S64 profile,
Daniel Henrique Barboza <=
- [PATCH for-9.0 v2 1/8] target/riscv: implement svade, Daniel Henrique Barboza, 2023/11/27
- [PATCH for-9.0 v2 2/8] target/riscv: add priv ver restriction to profiles, Daniel Henrique Barboza, 2023/11/27
- [PATCH for-9.0 v2 3/8] target/riscv/cpu.c: finalize satp_mode earlier, Daniel Henrique Barboza, 2023/11/27
- [PATCH for-9.0 v2 4/8] target/riscv/cpu.c: add riscv_cpu_is_32bit(), Daniel Henrique Barboza, 2023/11/27
- [PATCH for-9.0 v2 5/8] target/riscv: add satp_mode profile support, Daniel Henrique Barboza, 2023/11/27
- [PATCH for-9.0 v2 6/8] target/riscv: add 'parent' in profile description, Daniel Henrique Barboza, 2023/11/27
- [PATCH for-9.0 v2 7/8] target/riscv: add RVA22S64 profile, Daniel Henrique Barboza, 2023/11/27