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Re: [PATCH for-9.0 3/4] target/riscv/kvm: do PR_RISCV_V_SET_CONTROL duri


From: Alistair Francis
Subject: Re: [PATCH for-9.0 3/4] target/riscv/kvm: do PR_RISCV_V_SET_CONTROL during realize()
Date: Wed, 6 Dec 2023 10:25:53 +1000

On Fri, Dec 1, 2023 at 5:00 AM Daniel Henrique Barboza
<dbarboza@ventanamicro.com> wrote:
>
> Linux RISC-V vector documentation (Document/arch/riscv/vector.rst)
> mandates a prctl() in order to allow an userspace thread to use the
> Vector extension from the host.
>
> This is something to be done in realize() time, after init(), when we
> already decided whether we're using RVV or not. We don't have a
> realize() callback for KVM yet, so add kvm_cpu_realize() and enable RVV
> for the thread via PR_RISCV_V_SET_CONTROL.
>
> Signed-off-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>

Reviewed-by: Alistair Francis <alistair.francis@wdc.com>

Alistair

> ---
>  target/riscv/kvm/kvm-cpu.c | 29 +++++++++++++++++++++++++++++
>  1 file changed, 29 insertions(+)
>
> diff --git a/target/riscv/kvm/kvm-cpu.c b/target/riscv/kvm/kvm-cpu.c
> index 45b6cf1cfa..273c71baea 100644
> --- a/target/riscv/kvm/kvm-cpu.c
> +++ b/target/riscv/kvm/kvm-cpu.c
> @@ -18,6 +18,7 @@
>
>  #include "qemu/osdep.h"
>  #include <sys/ioctl.h>
> +#include <sys/prctl.h>
>
>  #include <linux/kvm.h>
>
> @@ -47,6 +48,9 @@
>  #include "sysemu/runstate.h"
>  #include "hw/riscv/numa.h"
>
> +#define PR_RISCV_V_SET_CONTROL            69
> +#define PR_RISCV_V_VSTATE_CTRL_ON          2
> +
>  void riscv_kvm_aplic_request(void *opaque, int irq, int level)
>  {
>      kvm_set_irq(kvm_state, irq, !!level);
> @@ -1481,11 +1485,36 @@ static void kvm_cpu_instance_init(CPUState *cs)
>      }
>  }
>
> +/*
> + * We'll get here via the following path:
> + *
> + * riscv_cpu_realize()
> + *   -> cpu_exec_realizefn()
> + *      -> kvm_cpu_realize() (via accel_cpu_common_realize())
> + */
> +static bool kvm_cpu_realize(CPUState *cs, Error **errp)
> +{
> +    RISCVCPU *cpu = RISCV_CPU(cs);
> +    int ret;
> +
> +    if (riscv_has_ext(&cpu->env, RVV)) {
> +        ret = prctl(PR_RISCV_V_SET_CONTROL, PR_RISCV_V_VSTATE_CTRL_ON);
> +        if (ret) {
> +            error_setg(errp, "Error in prctl PR_RISCV_V_SET_CONTROL, code: 
> %s",
> +                       strerrorname_np(errno));
> +            return false;
> +        }
> +    }
> +
> +   return true;
> +}
> +
>  static void kvm_cpu_accel_class_init(ObjectClass *oc, void *data)
>  {
>      AccelCPUClass *acc = ACCEL_CPU_CLASS(oc);
>
>      acc->cpu_instance_init = kvm_cpu_instance_init;
> +    acc->cpu_target_realize = kvm_cpu_realize;
>  }
>
>  static const TypeInfo kvm_cpu_accel_type_info = {
> --
> 2.41.0
>
>



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