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[PATCH v3] target/riscv: mcountinhibit, mcounteren, scounteren, hcounter
From: |
Vadim Shakirov |
Subject: |
[PATCH v3] target/riscv: mcountinhibit, mcounteren, scounteren, hcounteren is 32-bit |
Date: |
Wed, 31 Jan 2024 15:36:24 +0300 |
mcountinhibit, mcounteren, scounteren and hcounteren must always be 32-bit
by privileged spec
Signed-off-by: Vadim Shakirov <vadim.shakirov@syntacore.com>
---
target/riscv/cpu.h | 8 ++++----
target/riscv/machine.c | 16 ++++++++--------
2 files changed, 12 insertions(+), 12 deletions(-)
diff --git a/target/riscv/cpu.h b/target/riscv/cpu.h
index 5b0824ef8f..88efd8a6f9 100644
--- a/target/riscv/cpu.h
+++ b/target/riscv/cpu.h
@@ -254,7 +254,7 @@ struct CPUArchState {
target_ulong hstatus;
target_ulong hedeleg;
uint64_t hideleg;
- target_ulong hcounteren;
+ uint32_t hcounteren;
target_ulong htval;
target_ulong htinst;
target_ulong hgatp;
@@ -317,10 +317,10 @@ struct CPUArchState {
*/
bool two_stage_indirect_lookup;
- target_ulong scounteren;
- target_ulong mcounteren;
+ uint32_t scounteren;
+ uint32_t mcounteren;
- target_ulong mcountinhibit;
+ uint32_t mcountinhibit;
/* PMU counter state */
PMUCTRState pmu_ctrs[RV_MAX_MHPMCOUNTERS];
diff --git a/target/riscv/machine.c b/target/riscv/machine.c
index fdde243e04..f129032b0d 100644
--- a/target/riscv/machine.c
+++ b/target/riscv/machine.c
@@ -79,14 +79,14 @@ static bool hyper_needed(void *opaque)
static const VMStateDescription vmstate_hyper = {
.name = "cpu/hyper",
- .version_id = 3,
- .minimum_version_id = 3,
+ .version_id = 4,
+ .minimum_version_id = 4,
.needed = hyper_needed,
.fields = (VMStateField[]) {
VMSTATE_UINTTL(env.hstatus, RISCVCPU),
VMSTATE_UINTTL(env.hedeleg, RISCVCPU),
VMSTATE_UINT64(env.hideleg, RISCVCPU),
- VMSTATE_UINTTL(env.hcounteren, RISCVCPU),
+ VMSTATE_UINT32(env.hcounteren, RISCVCPU),
VMSTATE_UINTTL(env.htval, RISCVCPU),
VMSTATE_UINTTL(env.htinst, RISCVCPU),
VMSTATE_UINTTL(env.hgatp, RISCVCPU),
@@ -354,8 +354,8 @@ static const VMStateDescription vmstate_jvt = {
const VMStateDescription vmstate_riscv_cpu = {
.name = "cpu",
- .version_id = 9,
- .minimum_version_id = 9,
+ .version_id = 10,
+ .minimum_version_id = 10,
.post_load = riscv_cpu_post_load,
.fields = (VMStateField[]) {
VMSTATE_UINTTL_ARRAY(env.gpr, RISCVCPU, 32),
@@ -398,9 +398,9 @@ const VMStateDescription vmstate_riscv_cpu = {
VMSTATE_UINTTL(env.mtval, RISCVCPU),
VMSTATE_UINTTL(env.miselect, RISCVCPU),
VMSTATE_UINTTL(env.siselect, RISCVCPU),
- VMSTATE_UINTTL(env.scounteren, RISCVCPU),
- VMSTATE_UINTTL(env.mcounteren, RISCVCPU),
- VMSTATE_UINTTL(env.mcountinhibit, RISCVCPU),
+ VMSTATE_UINT32(env.scounteren, RISCVCPU),
+ VMSTATE_UINT32(env.mcounteren, RISCVCPU),
+ VMSTATE_UINT32(env.mcountinhibit, RISCVCPU),
VMSTATE_STRUCT_ARRAY(env.pmu_ctrs, RISCVCPU, RV_MAX_MHPMCOUNTERS, 0,
vmstate_pmu_ctr_state, PMUCTRState),
VMSTATE_UINTTL_ARRAY(env.mhpmevent_val, RISCVCPU, RV_MAX_MHPMEVENTS),
--
2.34.1
- [PATCH v3] target/riscv: mcountinhibit, mcounteren, scounteren, hcounteren is 32-bit,
Vadim Shakirov <=