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[PATCH v4 0/6] riscv: named features riscv,isa, 'svade' rework
From: |
Daniel Henrique Barboza |
Subject: |
[PATCH v4 0/6] riscv: named features riscv,isa, 'svade' rework |
Date: |
Thu, 15 Feb 2024 19:39:49 -0300 |
Hi,
This new version is rebased with alistair/riscv-to-apply.next and with
more acks added.
No other changes made.
Changes from v3:
- rebased with alistair/riscv-to-apply.next @ c93c42a273
- v3 link:
20240202152154.773253-1-dbarboza@ventanamicro.com/">https://lore.kernel.org/qemu-riscv/20240202152154.773253-1-dbarboza@ventanamicro.com/
Andrew Jones (3):
target/riscv: Reset henvcfg to zero
target/riscv: Gate hardware A/D PTE bit updating
target/riscv: Promote svade to a normal extension
Daniel Henrique Barboza (3):
target/riscv/tcg: set 'mmu' with 'satp' in cpu_set_profile()
target/riscv: add riscv,isa to named features
target/riscv: add remaining named features
target/riscv/cpu.c | 70 +++++++++++++++++++++++++++-----------
target/riscv/cpu_cfg.h | 12 +++++--
target/riscv/cpu_helper.c | 19 ++++++++---
target/riscv/csr.c | 2 +-
target/riscv/tcg/tcg-cpu.c | 34 +++++++++---------
5 files changed, 94 insertions(+), 43 deletions(-)
--
2.43.0
- [PATCH v4 0/6] riscv: named features riscv,isa, 'svade' rework,
Daniel Henrique Barboza <=
- [PATCH v4 1/6] target/riscv/tcg: set 'mmu' with 'satp' in cpu_set_profile(), Daniel Henrique Barboza, 2024/02/15
- [PATCH v4 2/6] target/riscv: add riscv,isa to named features, Daniel Henrique Barboza, 2024/02/15
- [PATCH v4 3/6] target/riscv: add remaining named features, Daniel Henrique Barboza, 2024/02/15
- [PATCH v4 4/6] target/riscv: Reset henvcfg to zero, Daniel Henrique Barboza, 2024/02/15
- [PATCH v4 5/6] target/riscv: Gate hardware A/D PTE bit updating, Daniel Henrique Barboza, 2024/02/15
- [PATCH v4 6/6] target/riscv: Promote svade to a normal extension, Daniel Henrique Barboza, 2024/02/15
- Re: [PATCH v4 0/6] riscv: named features riscv,isa, 'svade' rework, Alistair Francis, 2024/02/15