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[PATCH v2 01/15] exec/memtxattr: add process identifier to the transacti
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From: |
Daniel Henrique Barboza |
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Subject: |
[PATCH v2 01/15] exec/memtxattr: add process identifier to the transaction attributes |
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Date: |
Thu, 7 Mar 2024 13:03:04 -0300 |
From: Tomasz Jeznach <tjeznach@rivosinc.com>
Extend memory transaction attributes with process identifier to allow
per-request address translation logic to use requester_id / process_id
to identify memory mapping (e.g. enabling IOMMU w/ PASID translations).
Signed-off-by: Tomasz Jeznach <tjeznach@rivosinc.com>
---
include/exec/memattrs.h | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/include/exec/memattrs.h b/include/exec/memattrs.h
index 14cdd8d582..46d0725416 100644
--- a/include/exec/memattrs.h
+++ b/include/exec/memattrs.h
@@ -52,6 +52,11 @@ typedef struct MemTxAttrs {
unsigned int memory:1;
/* Requester ID (for MSI for example) */
unsigned int requester_id:16;
+
+ /*
+ * PCI PASID support: Limited to 8 bits process identifier.
+ */
+ unsigned int pasid:8;
} MemTxAttrs;
/* Bus masters which don't specify any attributes will get this,
--
2.43.2
- [PATCH v2 00/15] riscv: QEMU RISC-V IOMMU Support, Daniel Henrique Barboza, 2024/03/07
- [PATCH v2 01/15] exec/memtxattr: add process identifier to the transaction attributes,
Daniel Henrique Barboza <=
- [PATCH v2 02/15] hw/riscv: add riscv-iommu-bits.h, Daniel Henrique Barboza, 2024/03/07
- [PATCH v2 03/15] hw/riscv: add RISC-V IOMMU base emulation, Daniel Henrique Barboza, 2024/03/07
- [PATCH v2 06/15] hw/riscv/virt.c: support for RISC-V IOMMU PCIDevice hotplug, Daniel Henrique Barboza, 2024/03/07
- [PATCH v2 04/15] hw/riscv: add riscv-iommu-pci device, Daniel Henrique Barboza, 2024/03/07
- [PATCH v2 05/15] hw/riscv: add riscv-iommu-sys platform device, Daniel Henrique Barboza, 2024/03/07
- [PATCH v2 07/15] test/qtest: add riscv-iommu-pci tests, Daniel Henrique Barboza, 2024/03/07
- [PATCH v2 08/15] hw/riscv/riscv-iommu: add Address Translation Cache (IOATC), Daniel Henrique Barboza, 2024/03/07
- [PATCH v2 09/15] hw/riscv/riscv-iommu: add s-stage and g-stage support, Daniel Henrique Barboza, 2024/03/07
- [PATCH v2 10/15] hw/riscv/riscv-iommu: add ATS support, Daniel Henrique Barboza, 2024/03/07
- [PATCH v2 12/15] hw/riscv/riscv-iommu: Add another irq for mrif notifications, Daniel Henrique Barboza, 2024/03/07