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[PATCH for-9.1 v3 0/2] target/riscv: set tval in breakpoints


From: Daniel Henrique Barboza
Subject: [PATCH for-9.1 v3 0/2] target/riscv: set tval in breakpoints
Date: Tue, 16 Apr 2024 20:04:35 -0300

Hi,

This new version has a change suggested by Richard in v2. No other
changes made.

Changes from v2:
- patch 2:
  - use tcg_constant_tl() instead of loading a temp and doing a
    movi_tl()
- v2 link: 
20240416194132.1843699-1-dbarboza@ventanamicro.com/">https://lore.kernel.org/qemu-riscv/20240416194132.1843699-1-dbarboza@ventanamicro.com/


Daniel Henrique Barboza (2):
  target/riscv/debug: set tval=pc in breakpoint exceptions
  trans_privileged.c.inc: set (m|s)tval on ebreak breakpoint

 target/riscv/cpu_helper.c                      | 1 +
 target/riscv/debug.c                           | 3 +++
 target/riscv/insn_trans/trans_privileged.c.inc | 2 ++
 3 files changed, 6 insertions(+)

-- 
2.44.0




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