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[PULL 08/14] tests/qtest: xlnx-canfd-test: Fix code coverity issues
From: |
Peter Maydell |
Subject: |
[PULL 08/14] tests/qtest: xlnx-canfd-test: Fix code coverity issues |
Date: |
Thu, 6 Jul 2023 14:25:06 +0100 |
From: Vikram Garhwal <vikram.garhwal@amd.com>
Following are done to fix the coverity issues:
1. Change read_data to fix the CID 1512899: Out-of-bounds access (OVERRUN)
2. Fix match_rx_tx_data to fix CID 1512900: Logically dead code (DEADCODE)
3. Replace rand() in generate_random_data() with g_rand_int()
Signed-off-by: Vikram Garhwal <vikram.garhwal@amd.com>
Message-id: 20230628202758.16398-1-vikram.garhwal@amd.com
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
tests/qtest/xlnx-canfd-test.c | 33 +++++++++++----------------------
1 file changed, 11 insertions(+), 22 deletions(-)
diff --git a/tests/qtest/xlnx-canfd-test.c b/tests/qtest/xlnx-canfd-test.c
index 76ee106d4f4..78ec9ef2a76 100644
--- a/tests/qtest/xlnx-canfd-test.c
+++ b/tests/qtest/xlnx-canfd-test.c
@@ -170,23 +170,23 @@ static void generate_random_data(uint32_t *buf_tx, bool
is_canfd_frame)
/* Generate random TX data for CANFD frame. */
if (is_canfd_frame) {
for (int i = 0; i < CANFD_FRAME_SIZE - 2; i++) {
- buf_tx[2 + i] = rand();
+ buf_tx[2 + i] = g_random_int();
}
} else {
/* Generate random TX data for CAN frame. */
for (int i = 0; i < CAN_FRAME_SIZE - 2; i++) {
- buf_tx[2 + i] = rand();
+ buf_tx[2 + i] = g_random_int();
}
}
}
-static void read_data(QTestState *qts, uint64_t can_base_addr, uint32_t
*buf_rx)
+static void read_data(QTestState *qts, uint64_t can_base_addr, uint32_t
*buf_rx,
+ uint32_t frame_size)
{
uint32_t int_status;
uint32_t fifo_status_reg_value;
/* At which RX FIFO the received data is stored. */
uint8_t store_ind = 0;
- bool is_canfd_frame = false;
/* Read the interrupt on CANFD rx. */
int_status = qtest_readl(qts, can_base_addr + R_ISR_OFFSET) & ISR_RXOK;
@@ -207,16 +207,9 @@ static void read_data(QTestState *qts, uint64_t
can_base_addr, uint32_t *buf_rx)
buf_rx[0] = qtest_readl(qts, can_base_addr + R_RX0_ID_OFFSET);
buf_rx[1] = qtest_readl(qts, can_base_addr + R_RX0_DLC_OFFSET);
- is_canfd_frame = (buf_rx[1] >> DLC_FD_BIT_SHIFT) & 1;
-
- if (is_canfd_frame) {
- for (int i = 0; i < CANFD_FRAME_SIZE - 2; i++) {
- buf_rx[i + 2] = qtest_readl(qts,
- can_base_addr + R_RX0_DATA1_OFFSET + 4 *
i);
- }
- } else {
- buf_rx[2] = qtest_readl(qts, can_base_addr + R_RX0_DATA1_OFFSET);
- buf_rx[3] = qtest_readl(qts, can_base_addr + R_RX0_DATA2_OFFSET);
+ for (int i = 0; i < frame_size - 2; i++) {
+ buf_rx[i + 2] = qtest_readl(qts,
+ can_base_addr + R_RX0_DATA1_OFFSET + 4 * i);
}
/* Clear the RX interrupt. */
@@ -272,10 +265,6 @@ static void match_rx_tx_data(const uint32_t *buf_tx, const
uint32_t *buf_rx,
g_assert_cmpint((buf_rx[size] & DLC_FD_BIT_MASK), ==,
(buf_tx[size] & DLC_FD_BIT_MASK));
} else {
- if (!is_canfd_frame && size == 4) {
- break;
- }
-
g_assert_cmpint(buf_rx[size], ==, buf_tx[size]);
}
@@ -318,7 +307,7 @@ static void test_can_data_transfer(void)
write_data(qts, CANFD0_BASE_ADDR, buf_tx, false);
send_data(qts, CANFD0_BASE_ADDR);
- read_data(qts, CANFD1_BASE_ADDR, buf_rx);
+ read_data(qts, CANFD1_BASE_ADDR, buf_rx, CAN_FRAME_SIZE);
match_rx_tx_data(buf_tx, buf_rx, false);
qtest_quit(qts);
@@ -358,7 +347,7 @@ static void test_canfd_data_transfer(void)
write_data(qts, CANFD0_BASE_ADDR, buf_tx, true);
send_data(qts, CANFD0_BASE_ADDR);
- read_data(qts, CANFD1_BASE_ADDR, buf_rx);
+ read_data(qts, CANFD1_BASE_ADDR, buf_rx, CANFD_FRAME_SIZE);
match_rx_tx_data(buf_tx, buf_rx, true);
qtest_quit(qts);
@@ -397,7 +386,7 @@ static void test_can_loopback(void)
write_data(qts, CANFD0_BASE_ADDR, buf_tx, true);
send_data(qts, CANFD0_BASE_ADDR);
- read_data(qts, CANFD0_BASE_ADDR, buf_rx);
+ read_data(qts, CANFD0_BASE_ADDR, buf_rx, CANFD_FRAME_SIZE);
match_rx_tx_data(buf_tx, buf_rx, true);
generate_random_data(buf_tx, true);
@@ -405,7 +394,7 @@ static void test_can_loopback(void)
write_data(qts, CANFD1_BASE_ADDR, buf_tx, true);
send_data(qts, CANFD1_BASE_ADDR);
- read_data(qts, CANFD1_BASE_ADDR, buf_rx);
+ read_data(qts, CANFD1_BASE_ADDR, buf_rx, CANFD_FRAME_SIZE);
match_rx_tx_data(buf_tx, buf_rx, true);
qtest_quit(qts);
--
2.34.1
- [PULL v2 00/14] target-arm queue, Peter Maydell, 2023/07/06
- [PULL 02/14] hw/arm/sbsa-ref: use XHCI to replace EHCI, Peter Maydell, 2023/07/06
- [PULL 01/14] target/arm: Add raw_writes ops for register whose write induce TLB maintenance, Peter Maydell, 2023/07/06
- [PULL 08/14] tests/qtest: xlnx-canfd-test: Fix code coverity issues,
Peter Maydell <=
- [PULL 13/14] target/arm: Define neoverse-v1, Peter Maydell, 2023/07/06
- [PULL 06/14] target/arm: Fix SME full tile indexing, Peter Maydell, 2023/07/06
- [PULL 10/14] hw: arm: allwinner-sramc: Set class_size, Peter Maydell, 2023/07/06
- [PULL 09/14] target/arm: gdbstub: Guard M-profile code with CONFIG_TCG, Peter Maydell, 2023/07/06
- [PULL 12/14] target/arm: Suppress more TCG unimplemented features in ID registers, Peter Maydell, 2023/07/06
- [PULL 05/14] target/arm: Dump ZA[] when active, Peter Maydell, 2023/07/06
- [PULL 07/14] target/arm: Handle IC IVAU to improve compatibility with JITs, Peter Maydell, 2023/07/06
- [PULL 03/14] tests/tcg/aarch64/sysregs.c: Use S syntax for id_aa64zfr0_el1 and id_aa64smfr0_el1, Peter Maydell, 2023/07/06
- [PULL 11/14] target/xtensa: Assert that interrupt level is within bounds, Peter Maydell, 2023/07/06
- [PULL 04/14] target/arm: Avoid splitting Zregs across lines in dump, Peter Maydell, 2023/07/06