Re: [PATCH v4 39/48] target/loongarch: Implement LASX fpu fcvt instructions

[Richard Henderson]

On 8/30/23 01:48, Song Gao wrote:
> This patch includes:
> - XVFCVT{L/H}.{S.H/D.S};
> - XVFCVT.{H.S/S.D};
> - XVFRINT[{RNE/RZ/RP/RM}].{S/D};
> - XVFTINT[{RNE/RZ/RP/RM}].{W.S/L.D};
> - XVFTINT[RZ].{WU.S/LU.D};
> - XVFTINT[{RNE/RZ/RP/RM}].W.D;
> - XVFTINT[{RNE/RZ/RP/RM}]{L/H}.L.S;
> - XVFFINT.{S.W/D.L}[U];
> - X[CVFFINT.S.L, VFFINT{L/H}.D.W.
>
> Signed-off-by: Song Gao<gaosong@loongson.cn>
> ---
>   target/loongarch/insns.decode                |  58 ++++
>   target/loongarch/disas.c                     |  56 ++++
>   target/loongarch/vec_helper.c                | 263 ++++++++++++-------
>   target/loongarch/insn_trans/trans_lasx.c.inc |  56 ++++
>   4 files changed, 335 insertions(+), 98 deletions(-)

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>

r~