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[PULL 22/57] target/riscv: Rename riscv_cpu_mmu_index to riscv_env_mmu_i
From: |
Richard Henderson |
Subject: |
[PULL 22/57] target/riscv: Rename riscv_cpu_mmu_index to riscv_env_mmu_index |
Date: |
Fri, 2 Feb 2024 15:50:01 +1000 |
Free up the riscv_cpu_mmu_index name for other usage;
emphasize that the argument is 'env'.
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
target/riscv/cpu.h | 4 ++--
target/riscv/cpu_helper.c | 2 +-
2 files changed, 3 insertions(+), 3 deletions(-)
diff --git a/target/riscv/cpu.h b/target/riscv/cpu.h
index 5f3955c38d..9c825c7b51 100644
--- a/target/riscv/cpu.h
+++ b/target/riscv/cpu.h
@@ -498,7 +498,7 @@ target_ulong riscv_cpu_get_geilen(CPURISCVState *env);
void riscv_cpu_set_geilen(CPURISCVState *env, target_ulong geilen);
bool riscv_cpu_vector_enabled(CPURISCVState *env);
void riscv_cpu_set_virt_enabled(CPURISCVState *env, bool enable);
-int riscv_cpu_mmu_index(CPURISCVState *env, bool ifetch);
+int riscv_env_mmu_index(CPURISCVState *env, bool ifetch);
G_NORETURN void riscv_cpu_do_unaligned_access(CPUState *cs, vaddr addr,
MMUAccessType access_type,
int mmu_idx, uintptr_t retaddr);
@@ -507,7 +507,7 @@ bool riscv_cpu_tlb_fill(CPUState *cs, vaddr address, int
size,
bool probe, uintptr_t retaddr);
char *riscv_isa_string(RISCVCPU *cpu);
-#define cpu_mmu_index riscv_cpu_mmu_index
+#define cpu_mmu_index riscv_env_mmu_index
#ifndef CONFIG_USER_ONLY
void riscv_cpu_do_transaction_failed(CPUState *cs, hwaddr physaddr,
diff --git a/target/riscv/cpu_helper.c b/target/riscv/cpu_helper.c
index c7cc7eb423..15f87ecdb0 100644
--- a/target/riscv/cpu_helper.c
+++ b/target/riscv/cpu_helper.c
@@ -33,7 +33,7 @@
#include "debug.h"
#include "tcg/oversized-guest.h"
-int riscv_cpu_mmu_index(CPURISCVState *env, bool ifetch)
+int riscv_env_mmu_index(CPURISCVState *env, bool ifetch)
{
#ifdef CONFIG_USER_ONLY
return 0;
--
2.34.1
- [PULL 09/57] target/hppa: Populate CPUClass.mmu_index, (continued)
- [PULL 09/57] target/hppa: Populate CPUClass.mmu_index, Richard Henderson, 2024/02/02
- [PULL 10/57] target/i386: Populate CPUClass.mmu_index, Richard Henderson, 2024/02/02
- [PULL 11/57] target/loongarch: Populate CPUClass.mmu_index, Richard Henderson, 2024/02/02
- [PULL 12/57] target/loongarch: Rename MMU_IDX_*, Richard Henderson, 2024/02/02
- [PULL 13/57] target/m68k: Populate CPUClass.mmu_index, Richard Henderson, 2024/02/02
- [PULL 14/57] target/microblaze: Populate CPUClass.mmu_index, Richard Henderson, 2024/02/02
- [PULL 15/57] target/mips: Pass ptw_mmu_idx down from mips_cpu_tlb_fill, Richard Henderson, 2024/02/02
- [PULL 19/57] target/openrisc: Populate CPUClass.mmu_index, Richard Henderson, 2024/02/02
- [PULL 20/57] target/ppc: Split out ppc_env_mmu_index, Richard Henderson, 2024/02/02
- [PULL 21/57] target/ppc: Populate CPUClass.mmu_index, Richard Henderson, 2024/02/02
- [PULL 22/57] target/riscv: Rename riscv_cpu_mmu_index to riscv_env_mmu_index,
Richard Henderson <=
- [PULL 18/57] target/nios2: Populate CPUClass.mmu_index, Richard Henderson, 2024/02/02
- [PULL 17/57] target/mips: Populate CPUClass.mmu_index, Richard Henderson, 2024/02/02
- [PULL 16/57] target/mips: Split out mips_env_mmu_index, Richard Henderson, 2024/02/02
- [PULL 23/57] target/riscv: Replace cpu_mmu_index with riscv_env_mmu_index, Richard Henderson, 2024/02/02
- [PULL 24/57] target/riscv: Populate CPUClass.mmu_index, Richard Henderson, 2024/02/02
- [PULL 25/57] target/rx: Populate CPUClass.mmu_index, Richard Henderson, 2024/02/02
- [PULL 28/57] target/sh4: Populate CPUClass.mmu_index, Richard Henderson, 2024/02/02
- [PULL 30/57] target/tricore: Populate CPUClass.mmu_index, Richard Henderson, 2024/02/02
- [PULL 27/57] target/s390x: Populate CPUClass.mmu_index, Richard Henderson, 2024/02/02
- [PULL 29/57] target/sparc: Populate CPUClass.mmu_index, Richard Henderson, 2024/02/02